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DTC114YE

Description
DIGITAL TRANSISTOR (NPN)Digital transistor (NPN)
CategoryDiscrete semiconductor   
File Size113KB,2 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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DTC114YE Overview

DIGITAL TRANSISTOR (NPN)Digital transistor (NPN)

Features

Product Name: DIGITAL TRANSISTOR (NPN)


Product model: DTC114YE


Product Description:


Built-in bias resistors enable the configuration of an inverter circuit without connecting external input


resistors(see equivalent circuit)


The bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the


input.They also have the advantage of almost completely eliminating parasitic effects


Only the on/off conditions need to be set for operation, making device design easy




parameter:


Polarity: NPN


PD (power consumption): 150mW


Io (output current): 100mA


Vcc (power supply voltage): 50V


GI (DC Current Gain): 68


Vo (on) (output current): 0.3V


R1:10K+Ω


R2:47K+Ω


fT (transition frequency): 250+MHz


Package: SOT-523

DTC114YE Preview

Download Datasheet
JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
Digital transistors (built-in resistors)
DTC114YE/DTC114YUA
/DTC114YKA/DTC114YSA/DTC114YCA
DIGITAL TRANSISTOR (NPN)
FEATURES
1. Built-in bias resistors enable the configuration of an inverter circuit without
connecting external input resistors(see equivalent circuit).
2. The bias resistors consist of thin-film resistors with complete isolation to allow
negative biasing of the input. They also have the advantage of almost completely
eliminating parasitic effects.
3. Only the on/off conditions need to be set for operation, making device design easy.
PIN CONNENCTIONS AND MARKING
DTC114YE
DTC114YUA
SOT-523
Addreviated symbol: 64
SOT-323
Addreviated symbol: 64
DTC114YKA
DTA114ECA
DTC114YCA
SOT-23
SOT-23-3L
Addreviated symbol: 64
SOT-23
Addreviated symbol: 64
DTC114YSA
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