EN29F512-45JCP datasheet, PDF - EEWORLD Datasheet

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EN29F512-45JCP: DescriptionFlash, 64KX8, 45ns, PQCC32, LCC-32; Categorystorage storage; File Size427KB，35 Pages; ManufacturerESMT; Websitehttp://www.esmt.com.tw/; Environmental Compliance; Elite Semiconductor Memory Technology Inc. (ESMT) is a professional IC design company founded by Dr. Hu Zhao in June 1998. Its headquarters is located in Hsinchu Science Park, Taiwan. The company's main business includes research, development, manufacturing, sales and related technical services of IC products. It was listed on the Taiwan Stock Exchange in March 2002.

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EN29F512-45JCP Overview

Flash, 64KX8, 45ns, PQCC32, LCC-32

EN29F512-45JCP Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ESMT
package instruction	QCCJ, LDCC32,.5X.6
Reach Compliance Code	unknown
Maximum access time	45 ns
command user interface	YES
Data polling	YES
JESD-30 code	R-PQCC-J32
length	13.97 mm
memory density	524288 bit
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of departments/size	4
Number of terminals	32
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	3.505 mm
Department size	16K
Maximum standby current	0.000005 A
Maximum slew rate	0.03 mA
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
switch bit	YES
type	NOR TYPE
width	11.43 mm

EN29F512-45JCP Preview

EN29F512

512 Kbit (64K x 8-bit) 5V Flash Memory

FEATURES

•

5.0V operation for read/write/erase

operations

•

Fast Read Access Time

- 45ns, 55ns, 70ns, and 90ns

•

Sector Architecture:

4 uniform sectors of 16Kbytes each

Supports full chip erase

Individual sector erase supported

Sector protection:

Hardware locking of sectors to prevent

program or erase operations within

individual sectors

High performance program/erase speed

Byte program time: 7µs typical

Sector erase time: 300ms typical

Chip erase time: 1.5s typical

•

JEDEC Standard program and erase

commands

•

JEDEC standard

DATA

polling and toggle

bits feature

•

Single Sector and Chip Erase

•

Sector Unprotect Mode

•

Embedded Erase and Program Algorithms

•

Erase Suspend / Resume modes:

Read and program another Sector during

Erase Suspend Mode

•

0.23 µm triple-metal double-poly

triple-well CMOS Flash Technology

•

Low Vcc write inhibit < 3.2V

•

100K endurance cycle

•

Package Options

- 32-pin PDIP

- 32-pin PLCC

- 32-pin 8mm x 20mm TSOP (Type 1)

- 32-pin 8mm x 14mm TSOP (Type 1)

•

Commercial and Industrial Temperature

Ranges

•

Low Standby Current

- 1µA CMOS standby current-typical

- 1mA TTL standby current

•

Low Power Active Current

- 12mA typical active read current

- 30mA program/erase current

GENERAL DESCRIPTION

The EN29F512 is a 512-Kbit, electrically erasable, read/write non-volatile flash memory. Organized

into 64K bytes with 8 bits per byte, the 512K of memory is arranged in four uniform sectors of

16Kbytes each. Any byte can be programmed typically in 7µs. The EN29F512 features 5.0V

voltage read and write operation, with access times as fast as 45ns to eliminate the need for WAIT

states in high-performance microprocessor systems.

The EN29F512 has separate Output Enable (

), Chip Enable (

), and Write Enable (

W E

)

controls, which eliminate bus contention issues. This device is designed to allow either single

Sector or full chip erase operation, where each Sector can be individually protected against

program/erase operations or temporarily unprotected to erase or program. The device can sustain a

minimum of 100K program/erase cycles on each Sector.

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. A, Issue Date: 2003/10/20

EN29F512

TABLE 1. PIN DESCRIPTION

Pin Name

A0-A16

DQ0-DQ7

Function

Addresses

Data Inputs/Outputs

Chip Enable

Output Enable

Write Enable

Supply Voltage

(5V

10% )

Ground

Vss

A0 - A15

EN29F512

DQ0 - DQ7

FIGURE 1. LOGIC DIAGRAM

Vcc

Vss

TABLE 2. SECTOR ARCHITECTURE

Sector

ADDRESSES

0C000h – 0FFFFh

08000h – 0BFFFh

04000h - 07FFFh

00000h - 03FFFh

SIZE (Kbytes)

A15

A14

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. A, Issue Date: 2003/10/20

EN29F512

BLOCK DIAGRAM

Vcc

Vss

Block Protect Switches

DQ0-DQ7

Erase Voltage Generator

State

Control

Program Voltage

Generator

Chip Enable

Output Enable

Logic

STB

Input/Output Buffers

Command

Data Latch

Y-Decoder

Address Latch

STB

Y-Gating

Vcc Detector

Timer

X-Decoder

Cell Matrix

A0-A15

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. A, Issue Date: 2003/10/20

EN29F512

FIGURE 2. PDIP

FIGURE 3. PLCC

FIGURE 4. TSOP

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. A, Issue Date: 2003/10/20

EN29F512

TABLE 3. OPERATING MODES

512K FLASH USER MODE TABLE

USER MODE

STANDBY

READ

OUTPUT DISABLE

READ

MANUFACTURE ID

READ DEVICE ID

VERIFY SECTOR

PROTECTION

SECTOR

PROTECTION

VERIFY SECTOR

UNPROTECTION

SECTOR

UNPROTECTION

WRITE

Pulse

VID

L/H

Ax/y

DQ(0-7)

HI-Z

DQ (0-7)

HI-Z

MANUFACTURE

DEVICE ID

CODE

DIN (0-7)

NOTES:

1) L = V

, H = V

, V

= 11.0V

0.5V

2) X = Don’t care, either V

or V

3) Ax/y: Ax = Addr(x), Ay = Addr(y)

TABLE 4. DEVICE IDENTIFICTION

512K FLASH MANUFACTURER/DEVICE ID TABLE

READ

MANUFACTURER ID

READ

DEVICE ID

(1)

(2)

DQ(7-0)

HEX

MANUFACTURER ID

DEVICE ID

NOTES:

1) If a Manufacturing ID is read with A8 = L, the chip will output a configuration code 7Fh. A further

Manufacturing ID must be read with A8 = H.

2) X = Don’t care

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. A, Issue Date: 2003/10/20

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