UT62W64CSCL-35LE datasheet, PDF

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UT62W64CSCL-35LE: DescriptionStandard SRAM, 8KX8, 35ns, CMOS, PDSO28; Categorystorage storage; File Size87KB，12 Pages; ManufacturerUTRON; Websitehttp://www.utron.net/; Utron Technologies Corp. was established in 1983, specializing in the design and manufacture of bare board and cable testers. We are a well-known manufacturer and exporter of PCB and cable testers for over 14 years.

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UT62W64CSCL-35LE Overview

Standard SRAM, 8KX8, 35ns, CMOS, PDSO28

UT62W64CSCL-35LE Parametric

Parameter Name	Attribute value
Maker	UTRON
package instruction	SOP, SOP28,.5
Reach Compliance Code	unknown
Maximum access time	35 ns
I/O type	COMMON
JESD-30 code	R-PDSO-G28
memory density	65536 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	28
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-20 °C
organize	8KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP28,.5
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
power supply	3/5 V
Certification status	Not Qualified
Maximum standby current	0.00004 A
Minimum standby current	1.5 V
Maximum slew rate	0.05 mA
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL

UT62W64CSCL-35LE Preview



UTRON

Rev. 1.0

UT62W64C

8K X 8 BIT LOW POWER CMOS SRAM

REVISION HISTORY

REVISION

Rev. 1.0

DESCRIPTION

Original.

Draft date

Apr. 08. 2003

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882

FAX: 886-3-5777919

P80096



UTRON

Rev. 1.0

UT62W64C

8 KX 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION

The UT62W64C is a 65,536-bit low power CMOS

static random access memory organized as 8,192

words by 8 bits. It is fabricated using high

performance, high reliability CMOS technology.

its standby current is stable within the range of

operating temperature.

The UT62W64C is designed for low power

application. It is particularly well suited for battery

back-up nonvolatile memory application.

The UT62W64C operates with wide range power

supply and all inputs and outputs are fully TTL

compatible

FEATURES

Fast access time : 35/70ns

Low power consumption:

Operation : 40/20 mA (max.) (V

≦3.6

50/40 mA (max.) (V

≦5.5

Standby : -L / -LL version

1 / 0.5uA (typical) V

=2.7~3.6V

2 / 1uA (typical) V

=4.5~5.5V

Wide Range power supply: 2.7V~5.5V

Operating temperature :

Commercial : 0

℃

~70

℃

Extended : -20

℃

~85

℃

All inputs and outputs are TTL compatible

Fully static operation

Three state outputs

Data retention voltage : 1.5V (min.)

Package : 28-pin 600mil PDIP

28-pin 330 mil SOP

PIN CONFIGURATION

FUNCTIONAL BLOCK DIAGRAM

8K X 8

MEMORY

ARRAY

A12

Vcc

CE2

A11

A0-A12

DECODER

UT6264C

Vcc

Vss

A10

I/O8

I/O7

I/O6

I/O5

I/O4

I/O1-I/O8

I/O DATA

CIRCUIT

COLUMN I/O

I/O1

I/O2

I/O3

Vss

CE2

PDIP/SOP

CONTROL

CIRCUIT

PIN DESCRIPTION

SYMBOL

A0 - A12

I/O1 - I/O8

CE ,CE2

DESCRIPTION

Address Inputs

Data Inputs/Outputs

Chip Enable Inputs

Write Enable Input

Output Enable Input

Power Supply

Ground

No connection

P80096

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882

FAX: 886-3-5777919



UTRON

Rev. 1.0

UT62W64C

8K X 8 BIT LOW POWER CMOS SRAM

SYMBOL

TERM

STG

OUT

Tsolder

RATING

-0.5 to 7.0

0 to 70

-20 to 85

-65 to 150

260

UNIT

℃

ABSOLUTE MAXIMUM RATINGS*

PARAMETER

Terminal Voltage with Respect to V

Operation Temperature

Storage Temperature

Power Dissipation

DC Output Current

Soldering Temperature (under 10 sec)

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this

specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

TRUTH TABLE

MODE

Standby

Output Disable

Read

Write

Note:

CE2

I/O OPERATION

High - Z

OUT

SUPPLY CURRENT

SB,

SB1

SB,

SB1

CC,

CC1,

CC2

CC,

CC1,

CC2

CC,

CC1,

CC2

H = V

, L=V

, X = Don't care.

DC ELECTRICAL CHARACTERISTICS

= 0

℃

to 70

℃

/ -20

℃

to 85

℃

(E))

PARAMETER

SYMBOL TEST CONDITION

Power Supply Voltage

＊

Input High Voltage

＊

Input Low Voltage

Input Leakage Current

≦

I/O

≦

Output Leakage

= V

or CE2= V

Current

= V

Output High Voltage

= - 1mA

Output Low Voltage

= 4mA

Cycle time=Min, I

I/O

= 0mA,

= V

,CE2= V

Operation Power

Supply Current

CC1

TCycle =1us,

=0.2V; I

I/O

0mA other pins at 0.2V or

Vcc-0.2V;

Tcycle =500ns,

=0.2V; I

I/O

0mA , other pins at 0.2V or

Vcc-0.2V

MIN. TYP. MAX. MIN. TYP. MAX. UNIT

2.7~3.6

4.5~5.5

2.0

+0.5 2.2

+0.5 V

- 0.5

0.6

- 0.5

0.8

-1

µA

-1

2.2

0.4

-1

2.4

0.4

µA

- 35

- 70

CC2

Standby Power

Supply Current

= V

or CE2= V

other pins=V

or V

-L

-LL

0.5

100

µA

SB1

≧

-0.2V or

CE2

≦

0.2V , other pins

at 0.2V or Vcc-0.2V

Notes:

1. Overshoot : Vcc+2.0v for pulse width less than 10ns.

2. Undershoot : Vss-2.0v for pulse width less than 10ns.

3. Overshoot and Undershoot are sampled, not 100% tested.

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882

FAX: 886-3-5777919

P80096



UTRON

Rev. 1.0

UT62W64C

8 KX 8 BIT LOW POWER CMOS SRAM

CAPACITANCE

=25

℃

, f=1.0MHz)

PARAMETER

Input Capacitance

Input/Output Capacitance

SYMBOL

I/O

MIN.

MAX

UNIT

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Reference Levels

Output Load

0V to 3.0V

5ns

1.5V

= 100pF+1TTL, I

= -1mA/4mA

AC ELECTRICAL CHARACTERISTICS

= 2.7V~5.5V , T

= 0

℃

to 70

℃

/ -20

℃

to 85

℃

(E))

(1) READ CYCLE

PARAMETER

Read Cycle Time

Address Access Time

Chip Enable Access Time

Output Enable Access Time

Chip Enable to Output in Low Z

Output Enable to Output in Low Z

Chip Disable to Output in High Z

Output Disable to Output in High Z

Output Hold from Address Change

(2) WRITE CYCLE

PARAMETER

Write Cycle Time

Address Valid to End of Write

Chip Enable to End of Write

Address Set-up Time

Write Pulse Width

Write Recovery Time

Data to Write Time Overlap

Data Hold from End of Write Time

Output Active from End of Write

Write to Output in High Z

SYMBOL

UT62W64C-35

MIN.

MAX.

SYMBOL

UT62W64C-35

MIN.

MAX.

UT62W64C-70

MIN.

MAX.

UNIT

ACE

CLZ*

OLZ*

CHZ*

OHZ*

UT62W64C-70

MIN.

MAX.

UNIT

OW*

WHZ*

*These parameters are guaranteed by device characterization, but not production tested.

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882

FAX: 886-3-5777919

P80096



UTRON

Rev. 1.0

UT62W64C

8 KX 8 BIT LOW POWER CMOS SRAM

TIMING WAVEFORMS

READ CYCLE 1

(Address Controlled)

(1,2)

Address

Dout

Previous data valid

Data Valid

READ CYCLE 2

(

and

CE2

and

Controlled)

(1,3,4,5)

Address

ACE

CE2

CLZ

OLZ

Dout

High-Z

Data Valid

CHZ

OHZ

High-Z

Notes :

is high for read cycle.

2.Device is continuously selected OE =low, CE =low

CE2=high

3.Address must be valid prior to or coincident with CE =low

CE2=high; otherwise t

is the limiting parameter.

4.t

CLZ

, t

OLZ

, t

CHZ

and t

OHZ

are specified with C

=5pF. Transition is measured±500mV from steady state.

5.At any given temperature and voltage condition, t

CHZ

is less than t

CLZ

, t

OHZ

is less than t

OLZ

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882

FAX: 886-3-5777919

P80096

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