EN29F800B90T datasheet, PDF - EEWORLD Datasheet

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EN29F800B90T: DescriptionFlash, 512KX16, 90ns, PDSO48, TSOP1-48; Categorystorage storage; File Size226KB，38 Pages; ManufacturerESMT; Websitehttp://www.esmt.com.tw/; Elite Semiconductor Memory Technology Inc. (ESMT) is a professional IC design company founded by Dr. Hu Zhao in June 1998. Its headquarters is located in Hsinchu Science Park, Taiwan. The company's main business includes research, development, manufacturing, sales and related technical services of IC products. It was listed on the Taiwan Stock Exchange in March 2002.

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EN29F800B90T Overview

Flash, 512KX16, 90ns, PDSO48, TSOP1-48

EN29F800B90T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ESMT
package instruction	TSOP1, TSSOP48,.8,20
Reach Compliance Code	unknown
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G48
length	18.4 mm
memory density	8388608 bit
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,15
Number of terminals	48
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Encapsulate equivalent code	TSSOP48,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.06 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
switch bit	YES
type	NOR TYPE
width	10 mm

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EN29F800

8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory

Boot Sector Flash Memory, CMOS 5.0 Volt-only

FEATURES

•

5.0V

10%, single power supply operation

- Minimizes system level power requirements

•

Manufactured on 0.32 µm process technology

•

High performance

- Access times as fast as 45 ns

•

Low power consumption

25 mA typical active read current

30 mA typical program/erase current

1 µA typical standby current (standard access

time to active mode)

- Sector erase time: 500ms typical

- Chip erase time: 3.5s typical

•

Low Standby Current

- 1µA CMOS standby current-typical

- 1mA TTL standby current

•

Low Power Active Current

- 30mA active read current

- 30mA program/erase current

•

JEDEC Standard program and erase

commands

•

JEDEC standard

DATA

polling and toggle

bits feature

•

Single Sector and Chip Erase

•

Sector Unprotect Mode

•

Embedded Erase and Program Algorithms

•

Erase Suspend / Resume modes:

Read and program another Sector during

Erase Suspend Mode

•

0.32 µm double-metal double-poly

triple-well CMOS Flash Technology

•

Low Vcc write inhibit < 3.2V

•

>100K program/erase endurance cycle

•

Flexible Sector Architecture:

- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and

fifteen 64 Kbyte sectors (byte mode)

- One 8 Kword, two 4 Kword, one 16 Kword

and fifteen 32 Kword sectors (word mode)

- Supports full chip erase

- Individual sector erase supported

- Sector protection:

Hardware locking of sectors to prevent

program or erase operations within individual

sectors

Additionally, temporary Sector Group

Unprotect allows code changes in previously

locked sectors.

•

High performance program/erase speed

- Byte program time: 10µs typical

•

48-pin TSOP (Type 1)

•

Commercial Temperature Range

GENERAL DESCRIPTION

The EN29F800 is a 8-Megabit, electrically erasable, read/write non-volatile flash memory, organized

as 1,048,576 bytes or 524,288 words. Any byte can be programmed typically in 10µs. The

EN29F800 features 5.0V voltage read and write operation, with access times as fast as 45ns to

eliminate the need for WAIT states in high-performance microprocessor systems.

The EN29F800 has separate Output Enable (

), Chip Enable (

), and Write Enable (WE)

controls, which eliminate bus contention issues. This device is designed to allow either single (or

multiple) Sector or full chip erase operation, where each Sector can be individually protected against

program/erase operations or temporarily unprotected to erase or program. The device can sustain a

minimum of 100K program/erase cycles on each Sector.

4800 Great America Parkway, Suite 202

Santa Clara, CA 95054

Rev. E, Issue Date: 2001/07/05

Tel: 408-235-8680

Fax: 408-235-8685

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