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NT5TU256M4DE-3C

Description
DDR DRAM, 256MX4, 0.45ns, CMOS, PBGA60, GREEN, BGA-60
Categorystorage    storage   
File Size3MB,85 Pages
ManufacturerNanya
Websitehttp://www.nanya.com/cn
Environmental Compliance
Nanya Technology Co., Ltd. aims to become the best DRAM (dynamic random access memory) supplier. It emphasizes customer service and strengthens product R&D and manufacturing through close cooperation with partners, thereby providing customers with comprehensive products and system solutions. In the face of the growing niche DRAM market, Nanya Technology not only provides products ranging from 128Mb to 8Gb, but also continues to expand product diversification. The main application markets include digital TV, set-top box (STB), network communication, tablet computer and other smart electronic systems, automotive and industrial products. At the same time, in order to meet the needs of the rapidly growing mobile and wearable device market, Nanya Technology is more focused on the research and development and manufacturing of low-power memory products. In recent years, Nanya Technology has actively operated in the niche memory market, focusing on the research and development of low-power and customized core product lines. In terms of process progress, it has also introduced 20nm process technology and is committed to the production of DDR4 and LPDDR4 products, hoping to further enhance its overall competitiveness. Nanya Technology will also continue to strengthen its high value-added niche memory products and perfect customer service, enhance core business operating performance, ensure the rights and interests of all shareholders, and create sustainable business value for the company.
Download Datasheet Parametric View All

NT5TU256M4DE-3C Overview

DDR DRAM, 256MX4, 0.45ns, CMOS, PBGA60, GREEN, BGA-60

NT5TU256M4DE-3C Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNanya
Parts packaging codeBGA
package instructionTFBGA, BGA60,9X11,32
Contacts60
Reach Compliance Codecompliant
ECCN codeEAR99
access modeMULTI BANK PAGE BURST
Maximum access time0.45 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)333 MHz
I/O typeCOMMON
interleaved burst length4,8
JESD-30 codeR-PBGA-B60
length10 mm
memory density1073741824 bit
Memory IC TypeDDR DRAM
memory width4
Number of functions1
Number of ports1
Number of terminals60
word count268435456 words
character code256000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature
organize256MX4
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Encapsulate equivalent codeBGA60,9X11,32
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.8 V
Certification statusNot Qualified
refresh cycle8192
Maximum seat height1.2 mm
self refreshYES
Continuous burst length4,8
Maximum slew rate0.238 mA
Maximum supply voltage (Vsup)1.9 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width8 mm

NT5TU256M4DE-3C Preview

Download Datasheet
NT5TU256M4GE / NT5TU128M8GE / NT5TU64M16GG
1Gb DDR2 SDRAM
Feature
CAS Latency Frequency
DDR2-667
Speed Sorts
(CL-tRCD-tRP)
Parameter
Max. Clock Frequency
min
125
15
15
60
45
5
3.75
3
-
-
-3C
5-5-5
max
333
-
-
-
70K
8
8
8
-
-
min
125
12.5
12.5
57.5
45
5
3.75
2.5
2.5
-
DDR2-800
-AD
6-6-6
max
400
-
-
-
70K
8
8
8
8
-
tCK
(Avg.)
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
tRCD
tRP
tRC
tRAS
tCK
(Avg.)
@
CL3
tCK
(Avg.)
@
CL4
tCK
(Avg.)
@
CL5
tCK
(Avg.)
@
CL6
tCK
(Avg.)
@
CL7
1.8V ± 0.1V Power Supply Voltage
8 internal memory banks
Programmable CAS Latency:
5 (DDR2-3C)
6 (DDR2-AD)
Data-Strobes: Bidirectional, Differential
1KB page size for x4 and x8
2KB page size for x16
Strong and Weak Strength Data-Output Driver
Auto-Refresh and Self-Refresh
Power Saving Power-Down modes
7.8 µs max. Average Periodic Refresh Interval
RoHS Compliance
Packages:
60-Ball BGA for x4 / x8 components
84-Ball BGA for x16 components
Programmable Additive Latency: 0, 1, 2, 3, 4 5
Write Latency = Read Latency -1
Programmable Burst Length:
4 and 8 Programmable Sequential / Interleave Burst
OCD (Off-Chip Driver Impedance Adjustment)
ODT (On-Die Termination)
4 bit prefetch architecture
1
REV 1.0
06 / 2010
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