Time-interleaved sampling host computer oscilloscope

The sampling section is the core of this system. The ADC, as the core device in the data acquisition system that converts analog signals into digital signals, primarily determines the upper limit of the entire data acquisition system's performance. M ADCs with lower sampling rates acquire signals in parallel at the same sampling clock frequency but different sampling clock phases. The sampling sequences of these M ADCs are then combined as the system output to increase the sampling rate. The sampling system mainly inputs signals to the system through an SMA connector. The signals then pass through a forward signal conditioning circuit. The forward signal conditioning circuit mainly conditions various input signals, reducing interference and improving the signal-to-noise ratio. After pre-stage attenuation and isolation to isolate the signal from the preceding stage, gain control transforms large input signals into signals within the ADC's sampling range. Then, a voltage boosting circuit raises the negative half-axis of the signal to the positive half-axis of the ADC sampling. The data acquisition module controls the ADC to sample, and then the corresponding module sends the data to the host computer, where the host computer software reconstructs the waveform.