Abstract: This article takes Intel's 80C196 microcontroller and 11-channel 12-bit analog/digital conversion chip TLC2543 as examples to introduce the interface and programming of this type of ADC and microcontroller, and gives a specific C language program. This method is also applicable to other devices with SPI interface.
Keywords: 80C196; A/D converter; C language; TLC2543
1 Overview
80C196 is a high-performance CHMOS 16-bit single-chip microcomputer launched by Intel after 8096BH. The arithmetic logic unit in its CPU adopts a register-register structure. The CPU operation is directly oriented to the 256-byte register, eliminating the bottleneck effect of the accumulator in the general CPU interface, and improving the operation speed and data throughput. In addition, it has a set of high-efficiency and fast-execution instruction systems.
TLC2543 is a product of TI (TEXAS INSTRUMENT) and uses the switch capacitor successive approximation technology to complete the 12-bit A/D conversion process. The connection between TLC2543 and peripheral circuits is simple. There are three control input terminals: CS (chip select), input/output clock (I/O CLOCK) and serial data input terminal (DATA INPUT). The 14-channel multiplexer on the chip can select any one of the 11 inputs or one of the three internal self-test voltages. The chip is equipped with a sample-and-hold circuit, and the "conversion end" signal EOC indicates the completion of the conversion. The system clock is generated on the chip and synchronized by the I/O CLOCK. The positive and negative reference voltages (REF+, REF-) are provided externally, usually VCC and ground, and the difference between the two determines the input range. The on-chip converter makes the device have the characteristics of high speed, high precision and low noise. The external pin arrangement of TLC2543 is shown in Figure 1, and it adopts a 20-pin DIP package.
Figure 1 TLC2543 pin diagram
2 Hardware design
Since the MCS-96 series microcontroller does not have an SPI or an interface with the same capability, in order to facilitate the interface with TLC2543, software synthesized SPI operation is used. There is a CAM (Content Addressable Memory) in the 80C196 chip, which is the core control part of HSO and consists of 8 23-bit registers. 16 bits of each register are used to store the time to trigger an event, and 7 bits are used to store commands. In each state cycle, the time from the timer is compared with a predetermined time in the CAM. If the comparison result matches, it means that the time to trigger an event has arrived. Then the content of this item in the CAM is read out and the trigger signal of the event is generated.
The command format of HSO is shown in Figure 2. The 16 codes generated by the lower 4 bits specify the nature of the events triggered by the 16 channels. Bit 4 determines whether an interrupt is generated. Bit 5 determines the nature of the output event trigger signal, but it has no effect on channels 08-0FH. Bit 6 determines which timer is used as the time base.
The steps to write the command and the predetermined trigger time into the CAM array are as follows: first write the command into the HSO command register, then write the time into the HSO time register. After executing the latter operation, the command and time will be automatically loaded into the HSO holding register at the same time.
Figure 2 HSO command format
The working process of TLC2543 can be divided into I/O cycle and actual conversion cycle. The I/O cycle is defined by the externally provided I/O CLOCK and lasts for 8, 12 or 16 clock cycles, depending on the selected output data length. The interface timing is shown in Figure 3.
At the rising edge of the first 8 pulses of I/O CLOCK, 8 data streams are input from the DATA INPUT terminal to the input register in the MSB leading mode, of which the first 4 bits are the analog channel address, which controls the 14-channel analog multiplexer to select one path from 11 analog inputs and 3 internal self-test voltages to the use and hold circuit. The circuit samples the selected signal from the falling edge of the 4th I/O CLOCK pulse until the falling edge of the last I/O CLOCK pulse. The number of clock pulses in the IO cycle and the output data length are selected by the D3 and D2 bits of the input data at the same time, 8, 12 or 16. When working at 12 bits and 1 bit, DATA INPUT is invalid after the first 8 clocks.
Figure 3 TLC2543 timing diagram (MSB FIRST)
While the I/O CLOCK terminal inputs a pulse, the DATA OUT terminal serially outputs 8, 12 or 16 bits of data. The data read by the TLC2543 in each I/O cycle is the result of the last conversion, and the current conversion result is serially shifted out in the next I/O cycle.
After the last I/O CLOCK falling edge of the I/O cycle, EOC becomes low, the sampled value remains unchanged, and the conversion cycle begins. The on-chip converter performs a successive approximation A/D conversion on the sampled value, and its working process is controlled by an internal clock synchronized with the I/O CLOCK. After the conversion is completed, EOC becomes high, and the conversion result is latched in the output data register to be output in the next I/O cycle. The I/O cycle and the conversion cycle are performed alternately, thereby reducing the impact of external digital noise on the conversion accuracy.
Here, the HSO port of the 80C196 is used to simulate the SPI and TLC2543 interface, and the interface circuit is shown in Figure 4.
Figure 4 The hardware interface circuit of 80C196 and TLC2543
The clock signal is generated by HSO0, the input channel selection and input data length selection are output by HSO1, and HSO2 outputs the chip select signal. The A/D conversion result is read in by P1.0. The P1 port of 80C196 is a quasi-bidirectional port, which consists of an output buffer, an internal port latch, an internal port register and an output buffer.
3 Software Design
The following is a communication program written in C language. As a general high-level language, C language has greatly improved the work efficiency of single-chip microcomputer system development, enabling it to give full play to the increasing performance of single-chip microcomputer processors and shorten the time for products to enter the market. Different from the C language compiler in general computers, the C language compiler in the single-chip microcomputer must be specially optimized to provide high compilation efficiency. The code length and execution time of an excellent single-chip microcomputer system C compiler are only 20% longer than the same function program written in assembly language.
Among them, Delay() is a delay subroutine. Hso_con() controls the HSO subroutine. output() outputs 16-bit serial data, the first 4 bits are dummy data, and the last 12 bits are sent to the DAC register. A chip select ( ) pulse should be inserted at the beginning of each conversion, or it should change once at the beginning of the conversion sequence and remain low until the sequence ends. In order to transmit data reliably, the output delay method is used in the program to restore the SCLK signal to normal.
#define set_sclk 0x20
#define clr_sclk 0x00
#define set_din 0x21
#define clr_din 0x01
#define set_cs 0x22
#define clr_cs 0x02
#define mode 0x08 //Select channel 0, output data length is 12 bits, high bit leads
void Delay(unsigned int CNT) //Delay program
{
while (CNT)
CNT--;
}
void Hso_con(unsigned char com) //Control HSO
{
hso_command =com;
hso_time = timer1 + 2;
}
void read_dout()
{
//Omitted
}
void tlc2543(int mode)
{
unsigned char j;
Hso_con(clr_sclk);
Hso_con(set_cs);
Hso_con(clr_cs);
delay(10);
for(j=0;j<8;j++,mode<<=1)
{
read_dout();
if(mode&0x80)
{
Hso_con(set_din);
}
else
{
Hso_con(clr_din);
}
delay(100);
Hso_con(set_clk);
Hso_con(clr_clk);
}
for(j=0;j<4;j++)
{
read_dout();
Hso_con(set_clk);
Hso_con(clr_clk);
}
Hso_con(set_cs);
}
4 Conclusion
Since the MCS-96 series of microcontrollers do not have SPI or interfaces with equivalent capabilities, in order to facilitate the interface with TLC2543, software-synthesized SPI operations are adopted. This paper gives a method of using the microcontroller HSO port to simulate the SPI interface timing. With slight modifications to the program, it can be applied to other devices with SPI interface. Since TLC2543 has a serial input structure, it can save microcontroller I/O resources, and it is moderately priced and widely used.
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