Here is a FSMC expansion waveform. Let’s take a look and see if there is any room for improvement.

智能abc

Here is a FSMC expansion waveform. Let’s take a look and see if there is any room for improvement. [Copy link]

This is a waveform of the address signal of 16-bit writing to external SRAM with fsmc external expansion. Please analyze and see if there is any improvement.
This external controller can access correctly, but when looking at the address signal in the waveform, there is always an "extra" even address signal? Why?

123456.JPG (227.36 KB)

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2010-3-11 14:48

TonnySun

What does "redundant" mean?

As a memory interface, it is sufficient to ensure that each signal and its relationship are correct when CS is valid, and it does not need to care about the state when CS is invalid.

liuyi17

For example, the first address 0x2006 corresponds to WE1 = 1, WE0 = 0;
the second address 0x2006 corresponds to WE1 = 0, WE0 = 0;
I think the first 0x2006 here is invalid and redundant, because it is a 16-bit access and does not need this segment at all.

If you want to improve the access speed of the peripheral, can you start from this point?
This peripheral is a Graphic Controller SSD1906, which has several bus connection methods. I use GENERIC #2 here.

wbf721

                                 Check your program to see if there are any unaligned access operations, such as a half-word (16-bit) operation on address 0x2005 and a half-word (16-bit) operation on address 0x2007.

sunylqh

This is a waveform of the address signal of 16-bit writing to external SRAM with fsmc external expansion. Please analyze and see if there is any improvement.
This external controller can access correctly, but when looking at the address signal in the waveform, there is always an "extra" even address signal? Why? ...

After looking at the picture, I find that your write signal is very slow, with only one write pulse in 1us. I think you can send 10 write pulses in 1us.

micstar

I remember that the program writes half words to the dual addresses in sequence:
I will confirm it again tomorrow.

Thank you for the reply on the 5th floor. I calculated that the writing speed is indeed slow and should be improved.

wjialin

                                 Come in and learn

lph1025

                                 The writing speed is a bit slow.

超超真

                                 A bit slow indeed

cqwangsf

                                 I would like to ask how to view this waveform? Can it be viewed under Keil?

panama

I would like to ask how to view this waveform? Can it be viewed under Keil?

LZ uses ZlgLogic, Zhou Ligong's logic analyzer, which may not be visible under Keil.