Discussion on the interrupt program flow of MSP430F5 SPI slave mode

sxwglxq

Discussion on the interrupt program flow of MSP430F5 SPI slave mode [Copy link]

I now have two MCUs, MCU1 uses 3 GPIOs to simulate SPI as the master device, and 430 as the slave device. I looked at a TI example, and the SPI interrupt part is like this:

Enter interrupt->Judge whether data can be sent (if "no", continue to wait; if "yes", put the data to be sent into the send buffer)->Receive data from the master device->Exit.

If I want to send data from the slave device to the master device, I will tell the master device by setting the 4th GPIO4. The master device will read the data when it detects GPIO4 is high. So where should the GPIO4 setting operation be placed? If it is placed in the interrupt program, the master device will not send a clock signal and the program will not enter the interrupt; if it is placed outside, the data read by the master device will be wrong. The master device starts reading data from the first falling edge of the clock. What is a good solution?

The TI routine is as follows:

#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR (void)
{
switch (__even_in_range(UCA0IV,4)){
//Vector 2 - RXIFG
case 2:
//USCI_A0 TX buffer ready?
while (!SPI_getInterruptStatus(__MSP430_BASEADDRESS_USCI_A0__,
SPI_TRANSMIT_INTERRUPT
)) ;

//Transmit data to master
SPI_transmitData(__MSP430_BASEADDRESS_USCI_A0__,
transmitData
);

//Receive data from master
receiveData = SPI_receiveData(__MSP430_BASEADDRESS_USCI_A0__);

//Increment data to be transmitted
transmitData++;

break;

default: break;
}
}