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Published on 2012-7-9 19:50
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It is used for frequency adjustment. To put it simply, for example, if you use a 32768 clock to divide a 9600 baud rate, the frequency division factor is about 3.41, and the machine cannot distinguish decimals. Therefore, the width of some BIT bits (in time) takes up 3 clock cycles, and some take up 4 clock cycles. On average, each bit of the UART takes up approximately 3.4 cycles. This register is used to do this.
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Published on 2012-12-9 13:54
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I have also read many examples but I don't quite understand what UCA0MCTL does. What is the difference between the two modes UCA0MCTL = UCBRS2 + UCBRS0 and UCA0MCTL = UCBRS0? Please explain. Thanks. Does the host understand? Can you explain it to me?
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Published on 2012-11-25 08:02
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guangchaoji
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