Forum»Forum › FPGA/CPLD › Why can I output reg but not write reg?

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Published on 2016-12-9 15:45 Only look at the author

Why can I output reg but not write reg? [Copy link]

Why can I output reg but not write reg?

Altera

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reallmy

Wire and reg are two types of variables. Wire is of line type, and reg is of register type. A variable is either of wire type or reg type. How can it be both? ? Details Published on 2016-12-10 16:07

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Published on 2016-12-9 19:53 Only look at the author

The output should correspond to the input.

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reallmy

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Published on 2016-12-10 16:07 Only look at the author

Wire and reg are two types of variables. Wire is of line type, and reg is of register type. A variable is either of wire type or reg type. How can it be both? ?

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