| Part Number | Manufacturer | Description | Datasheet |
|---|---|---|---|
| TPE48-P203-B | Azoteq | Capacitive touch sensor module | download |
| TPR48-P203-B | Azoteq | Capacitive touch sensor module | download |
| TPR54-P303-B | Azoteq | Capacitive touch sensor module | download |
| TPR40-P103-B | Azoteq | Capacitive touch sensor module | download |
| TPR54-P203-B | Azoteq | Capacitive touch sensor module | download |
| TPE60-P203-B | Azoteq | Capacitive touch sensor module | download |
| HC89F301B | Shanghai Holychip Electronic Co., Ltd. | Enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology, 16K FLASH, 256 Bytes IRAM and 512 Bytes XRAM, 14 bidirectional I/O ports, 1 peripheral function pin fully mapped module PTM, 4 16 Bit timer/counter, 1 set of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 1 UART, 1 SPI, 1 IIC, 2 external interrupts, 7-channel capacitive touch button detection, 7+2 12-bit ADC, four system operating modes (normal, low speed, power down and idle) and 14 interrupt sources | download |
| HC89F302B | Shanghai Holychip Electronic Co., Ltd. | An enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology. It has 16K Bytes FLASH program memory, 256 Bytes IRAM and 512 Bytes XRAM. It has up to 22 bidirectional I/O ports and 1 peripheral function pin is fully mapped. Module PTM, 4 16-bit timers/counters, 1 set of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 1 UART, 1 SPI, 1 IIC, up to 4 external interrupts, up to 12 channels Capacitive touch button detection, 13+2 channels 12-bit ADC, four system operating modes (normal, low speed, power down and idle) and 14 interrupt sources | download |
| HC89F303B | Shanghai Holychip Electronic Co., Ltd. | An enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology. It has 16K Bytes FLASH program memory, 256 Bytes IRAM and 512 Bytes XRAM, 26 bidirectional I/O ports, and 1 peripheral function pin fully mapped module. PTM, 4 16-bit timers/counters, 1 set of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 1 UART, 1 SPI, 1 IIC, 4 external interrupts, 16-channel capacitive touch buttons Detection, 16+2 channels 12-bit ADC, four system operating modes (normal, low speed, power down and idle) and 14 interrupt sources | download |
| HC89F3421 | Shanghai Holychip Electronic Co., Ltd. | An enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology. It has 16K Bytes FLASH program memory, 256 Bytes IRAM and 1K Bytes XRAM, 14 bidirectional I/O ports, and 1 peripheral function pin fully mapped module. PTM, 5 16-bit timers/counters, 3 groups of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 2 UARTs, 1 SPI, 1 IIC, 14 external interrupts, 7-channel capacitive touch buttons Detection, up to 7+2 channels of 12-bit ADC, four system operating modes (normal, low speed, power down and idle) and 19 interrupt sources | download |
| HC89F3531 | Shanghai Holychip Electronic Co., Ltd. | An enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology. It has 32K Bytes FLASH program memory, 256 Bytes IRAM and 1K Bytes XRAM. It has up to 22 bidirectional I/O ports and 1 peripheral function pin is fully mapped. Module PTM, 5 16-bit timers/counters, 3 groups of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 2 UARTs, 1 SPI, 1 IIC, up to 22 external interrupts, up to 12 channels Capacitive touch button detection, up to 13+2 channels of 12-bit ADC, four system operating modes (normal, low speed, power down and idle) and 19 interrupt sources | download |
| HC89F3541 | Shanghai Holychip Electronic Co., Ltd. | An enhanced 8-bit touch microcontroller designed and developed with high-speed and low-power CMOS technology. It has 32K Bytes FLASH program memory, 256 Bytes IRAM and 1K Bytes XRAM. It has up to 30 bidirectional I/O ports and 1 peripheral function pin is fully mapped. Module PTM, 5 16-bit timers/counters, 3 groups of 12-bit complementary PWM with dead zone control, 1 8-bit PWM, 2 UARTs, 1 SPI, 1 IIC, 26 external interrupts, 16-channel capacitive touch | download |
| HC89F3650 | Shanghai Holychip Electronic Co., Ltd. | Enhanced 8-bit microcontroller designed and developed with high-speed and low-power CMOS technology, internal 64KBytes FLASH program memory, 256 Bytes IRAM and 2K Bytes XRAM, 46/42 bidirectional I/O ports, 1 peripheral function pin fully mapped module PTM , 2 16-bit timers/counters, 2 PCA modules, 3 sets of 12-bit complementary PWM with dead zone control, 2 UARTs, 1 IIC, 1 SPI, 1 RTC, 16 external interrupts, 24 capacitors Touch button detection, 24+2 channels 12-bit ADC, four system working modes (normal, low speed, power down and idle) and 17 interrupt sources | download |
| KF8F333-TS28 | ChipON | KF8F333 is a Harvard architecture reduced instruction CPU. The instruction byte length is 16 bits, and most instructions can be executed within one machine cycle. There are 68 instructions in total, which is highly efficient and easy to expand. The chip integrates a variety of peripherals, including an 8-bit timer/counter T0, an 8-bit timer and a 16-bit timer/counter T1, two 8-bit PWM modules, and one 10-bit enhanced PWM module, 1 full-duplex asynchronous communication module, 2 analog comparator modules, 1 8-way capacitive touch module, 1 10-bit 12-channel AD module, 1 operational amplifier module, hardware watchdog and low voltage detection and Low voltage reset module, etc. The chip integrates 256×8-bit data memory RAM, 4K×16-bit program memory and 128×16-bit BLOCK EEPROM | download |
| KF8F333-SS28 | ChipON | KF8F333 is a Harvard architecture reduced instruction CPU. The instruction byte length is 16 bits, and most instructions can be executed within one machine cycle. There are 68 instructions in total, which is highly efficient and easy to expand. The chip integrates a variety of peripherals, including an 8-bit timer/counter T0, an 8-bit timer and a 16-bit timer/counter T1, two 8-bit PWM modules, and one 10-bit enhanced PWM module, 1 full-duplex asynchronous communication module, 2 analog comparator modules, 1 8-way capacitive touch module, 1 10-bit 12-channel AD module, 1 operational amplifier module, hardware watchdog and low voltage detection and Low voltage reset module, etc. The chip integrates 256×8-bit data memory RAM, 4K×16-bit program memory and 128×16-bit BLOCK EEPROM | download |
| KF8F333-S28 | ChipON | KF8F333 is a Harvard architecture reduced instruction CPU. The instruction byte length is 16 bits, and most instructions can be executed within one machine cycle. There are 68 instructions in total, which is highly efficient and easy to expand. The chip integrates a variety of peripherals, including an 8-bit timer/counter T0, an 8-bit timer and a 16-bit timer/counter T1, two 8-bit PWM modules, and one 10-bit enhanced PWM module, 1 full-duplex asynchronous communication module, 2 analog comparator modules, 1 8-way capacitive touch module, 1 10-bit 12-channel AD module, 1 operational amplifier module, hardware watchdog and low voltage detection and Low voltage reset module, etc. The chip integrates 256×8-bit data memory RAM, 4K×16-bit program memory and 128×16-bit BLOCK EEPROM | download |
| KF8TS2716QP | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2716UN | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2716TN | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2716SN | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2714SG | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2710SE | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2708SD | ChipON | KF8TS2716 is a Harvard architecture reduced instruction CPU. The KF8TS2716 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, a 12-bit 10/14/14-channel AD module, 2 8-bit PWM modules, a 14/18/22-channel capacitive touch module, 1 SSCI (I2C/SPI) module, 1 universal full-duplex serial port (USART ) module, an 8×8 LED driver module, a 16-channel Vbias bias output module, hardware watchdog and low-voltage detection and low-voltage reset modules, etc. The chip integrates 1040(1024+16)×8-bit user data memory and 8K×16-bit program memory. | download |
| KF8TS2516TN | ChipON | KF8TS2508/2510/2514 is a reduced instruction CPU with Harvard architecture. The KF8TS2508/2510/2514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, and a 16-bit timer/counter. T4, a 12-bit 8/10/14-channel AD module, two 8-bit PWM modules, an 8/10/14-channel capacitive touch module, an I2C module, internal reference voltage module, hardware watchdog and low Voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS2508 has 8 AD channels and 8 capacitive touch channels; KF8TS2510 has 10 AD channels and 10 capacitive touch channels; KF8TS2514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS2516SN | ChipON | KF8TS2508/2510/2514 is a reduced instruction CPU with Harvard architecture. The KF8TS2508/2510/2514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, and a 16-bit timer/counter. T4, a 12-bit 8/10/14-channel AD module, two 8-bit PWM modules, an 8/10/14-channel capacitive touch module, an I2C module, internal reference voltage module, hardware watchdog and low Voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS2508 has 8 AD channels and 8 capacitive touch channels; KF8TS2510 has 10 AD channels and 10 capacitive touch channels; KF8TS2514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS3514NG | ChipON | KF8TS3510/3514 is a Harvard architecture reduced instruction CPU. The KF8TS3510/3514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, 1 12-bit 8/10/14-channel AD module, 1 comparator module, 1 operational amplifier module, 2 8-bit PWM modules, an 8/10/14-channel capacitive touch module, 1 I2C module, internal Reference voltage module, hardware watchdog, low voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS3510 has 10 AD channels and 10 capacitive touch channels; KF8TS3514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS3514SG | ChipON | KF8TS3510/3514 is a Harvard architecture reduced instruction CPU. The KF8TS3510/3514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, 1 12-bit 8/10/14-channel AD module, 1 comparator module, 1 operational amplifier module, 2 8-bit PWM modules, an 8/10/14-channel capacitive touch module, 1 I2C module, internal Reference voltage module, hardware watchdog, low voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS3510 has 10 AD channels and 10 capacitive touch channels; KF8TS3514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS3510SE | ChipON | KF8TS3510/3514 is a Harvard architecture reduced instruction CPU. The KF8TS3510/3514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, 1 12-bit 8/10/14-channel AD module, 1 comparator module, 1 operational amplifier module, 2 8-bit PWM modules, an 8/10/14-channel capacitive touch module, 1 I2C module, internal Reference voltage module, hardware watchdog, low voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS3510 has 10 AD channels and 10 capacitive touch channels; KF8TS3514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS3508SD | ChipON | KF8TS3510/3514 is a Harvard architecture reduced instruction CPU. The KF8TS3510/3514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, a 16-bit timer/counter T4, 1 12-bit 8/10/14-channel AD module, 1 comparator module, 1 operational amplifier module, 2 8-bit PWM modules, an 8/10/14-channel capacitive touch module, 1 I2C module, internal Reference voltage module, hardware watchdog, low voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS3510 has 10 AD channels and 10 capacitive touch channels; KF8TS3514 has 14 AD channels and 14 capacitive touch channels; | download |
| KF8TS2514SG | ChipON | KF8TS2508/2510/2514 is a reduced instruction CPU with Harvard architecture. The KF8TS2508/2510/2514 chip integrates a variety of peripherals, including an 8-bit timer/counter T0, a 16-bit timer/counter T1, a 16-bit timer T3, and a 16-bit timer/counter. T4, a 12-bit 8/10/14-channel AD module, two 8-bit PWM modules, an 8/10/14-channel capacitive touch module, an I2C module, internal reference voltage module, hardware watchdog and low Voltage detection and low voltage reset module, etc. The chip integrates 400×8-bit user data memory and 4K×16-bit program memory. Note: KF8TS2508 has 8 AD channels and 8 capacitive touch channels; KF8TS2510 has 10 AD channels and 10 capacitive touch channels; KF8TS2514 has 14 AD channels and 14 capacitive touch channels; | download |
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