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FIN1018M

Description
LINE RECEIVER, PDSO8
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size1MB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
Related ProductsFound20parts with similar functions to FIN1018M
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FIN1018M Overview

LINE RECEIVER, PDSO8

FIN1018M Parametric

Parameter NameAttribute value
Brand NameFairchild Semiconduc
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Manufacturer packaging code8LD, SOIC,JEDEC MS-012, .150\" NARROW BODY
Reach Compliance Codeunknow
ECCN codeEAR99
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsEIA-644; TIA-644
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output low current0.008 A
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum receive delay2.5 ns
Number of receiver bits1
Maximum seat height1.75 mm
Maximum slew rate7 mA
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver
March 2001
Revised April 2002
FIN1018
3.3V LVDS 1-Bit High Speed Differential Receiver
General Description
This single receiver is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The receiver translates LVDS levels, with a typ-
ical differential input threshold of 100 mV, to LVTTL signal
levels. LVDS provides low EMI at ultra low power dissipa-
tion even at high frequencies. This device is ideal for high
speed transfer of clock or data.
The FIN1018 can be paired with its companion driver, the
FIN1017, or with any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
3.3V power supply operation
s
0.4ns maximum pulse skew
s
2.5ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Fail safe protection for open-circuit, shorted and termi-
nated conditions
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Flow-through pinout simplifies PCB layout
s
8-Lead SOIC and US-8 packages save space
Ordering Code:
Order Number
FIN1018M
FIN1018MX
FIN1018K8X
Package Number
M08A
M08A
MAB08A
Package Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
Pin Descriptions
Pin Name
R
OUT
R
IN+
R
IN−
V
CC
GND
NC
Description
LVTTL Data Output
Non-inverting Driver Input
Inverting Driver Input
Power Supply
Ground
No Connect
Connection Diagrams
8-Lead SOIC
Function Table
Input
R
IN+
L
H
R
IN−
H
L
Outputs
R
OUT
L
H
H
Pin Assignment for US-8 Package
Fail Safe Condition
H
=
HIGH Logic Level
L
=
LOW Logic Level
Fail Safe
=
Open, Shorted, Terminated
TOP VIEW
© 2002 Fairchild Semiconductor Corporation
DS500502
www.fairchildsemi.com

FIN1018M Related Products

FIN1018M FIN1018
Description LINE RECEIVER, PDSO8 LINE RECEIVER, PDSO8
Input properties DIFFERENTIAL DIFFERENTIAL
Interface standards EIA-644; TIA-644 EIA-644; TIA-644
length 4.9 mm 2.3 mm
Number of functions 1 1
Number of terminals 8 8
Maximum operating temperature 85 °C 85 Cel
Minimum operating temperature -40 °C -40 Cel
Number of receiver bits 1 1
Maximum supply voltage 3.6 V 3.6 V
Minimum supply voltage 3 V 3 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING
Terminal location DUAL DUAL
width 3.9 mm 2 mm

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