Page Mode DRAM, 64KX4, 80ns, MOS, PZIP20, ZIP-20
| Parameter Name | Attribute value |
| Is it lead-free? | Contains lead |
| Is it Rohs certified? | incompatible |
| Maker | Intel |
| Parts packaging code | ZIP |
| package instruction | ZIP, ZIP20,.1 |
| Contacts | 20 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| access mode | PAGE |
| Maximum access time | 80 ns |
| Other features | RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH |
| I/O type | COMMON |
| JESD-30 code | R-PZIP-T20 |
| JESD-609 code | e0 |
| length | 26.162 mm |
| memory density | 262144 bit |
| Memory IC Type | PAGE MODE DRAM |
| memory width | 4 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 20 |
| word count | 65536 words |
| character code | 64000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 64KX4 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | ZIP |
| Encapsulate equivalent code | ZIP20,.1 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Certification status | Not Qualified |
| refresh cycle | 256 |
| Maximum seat height | 10.16 mm |
| Maximum slew rate | 0.065 mA |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | MOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 1.27 mm |
| Terminal location | ZIG-ZAG |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 3 mm |
| Base Number Matches | 1 |
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