EH1100HSETTS-16.384M
REGULATORY COMPLIANCE
(Data Sheet downloaded on Dec 22, 2017)
2011/65
144 SVHC
ITEM DESCRIPTION
Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 8 Pin DIP Metal Thru-Hole 16.384MHz ±100ppm
-40°C to +85°C
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage (Vih and Vil)
Absolute Clock Jitter
One Sigma Clock Period Jitter
Start Up Time
Storage Temperature Range
16.384MHz
±100ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating
Temperature Range, Supply Voltage Change, Output Load Change, First Year Aging at 25°C, Shock, and Vibration.)
±5ppm/year Maximum
-40°C to +85°C
5.0Vdc ±10%
50mA Maximum (No Load)
2.4Vdc Minimum with TTL Load, Vdd-0.4Vdc Minimum with HCMOS Load (IOH = -16mA)
0.4Vdc Maximum with TTL Load, 0.5Vdc Maximum with HCMOS Load (IOL = +16mA)
6nSec Maximum (Measured at 0.8Vdc to 2.0Vdc with TTL Load; Measured at 20% to 80% of waveform with HCMOS
Load)
50 ±10(%) (Measured at 1.4Vdc with TTL Load or at 50% of waveform with HCMOS Load)
10TTL Load or 50pF HCMOS Load Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
+2.2Vdc Minimum to enable output, +0.8Vdc Maximum to disable output (High Impedance), No Connect to enable
output.
±250pSec Maximum, ±100pSec Typical
±50pSec Maximum, ±30pSec Typical
10mSec Maximum
-55°C to +125°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
Fine Leak Test
Gross Leak Test
Lead Integrity
Mechanical Shock
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 1014, Condition A
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2004
MIL-STD-202, Method 213, Condition C
MIL-STD-202, Method 210
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010
MIL-STD-883, Method 2007, Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | 14 Pin DIP Revision C 12/01/2005 | 8 Pin DIP Revision C
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EH1100HSETTS-16.384M
MECHANICAL DIMENSIONS (all dimensions in millimeters)
PIN
CONNECTION
Tri-State
Case/Ground
Output
Supply Voltage
7.620 ±0.203
1
7.620
±0.203 8
4
5
DIA 0.457
±0.1 (X4)
0.8 ±0.1 (X3)
1
4
5
8
LINE MARKING
5.08 MIN
5.6 MAX
13.2
MAX
MARKING
ORIENTATION
1
2
3
4
ECLIPTEK
EH11TS
EH11=Product Series
16.384M
XXYZZ
XX=Ecliptek Manufacturing
Code
Y=Last Digit of the Year
ZZ=Week of the Year
13.2
MAX
www.ecliptek.com | Specification Subject to Change Without Notice | 14 Pin DIP Revision C 12/01/2005 | 8 Pin DIP Revision C
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EH1100HSETTS-16.384M
OUTPUT WAVEFORM & TIMING DIAGRAM
TRI-STATE INPUT
V
IH
V
IL
CLOCK OUTPUT
V
OH
80% or 2.4V
DC
50% or 1.4V
DC
20% or 0.4V
DC
V
OL
OUTPUT DISABLE
(HIGH IMPEDANCE
STATE)
t
PLZ
Fall
Time
Rise
Time
T
W
T
Duty Cycle (%) = T
W
/T x 100
t
PZL
www.ecliptek.com | Specification Subject to Change Without Notice | 14 Pin DIP Revision C 12/01/2005 | 8 Pin DIP Revision C
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EH1100HSETTS-16.384M
Test Circuit for TTL Output
Output Load
Drive Capability
10TTL
5TTL
2TTL
10LSTTL
1TTL
R
L
Value
(Ohms)
390
780
1100
2000
2200
C
L
Value
(pF)
15
15
6
15
3
Oscilloscope
Frequency
Counter
Table 1: R
L
Resistance Value and C
L
Capacitance
Value Vs. Output Load Drive Capability
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
R
L
(Note 4)
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
+
0.01µF
(Note 1)
0.1µF
(Note 1)
C
L
(Note 3)
Power
Supply
_
Ground
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
Note 4: Resistance value R
L
is shown in Table 1. See applicable specification sheet for 'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
www.ecliptek.com | Specification Subject to Change Without Notice | 14 Pin DIP Revision C 12/01/2005 | 8 Pin DIP Revision C
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EH1100HSETTS-16.384M
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
No Connect
or Tri-State
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | 14 Pin DIP Revision C 12/01/2005 | 8 Pin DIP Revision C
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
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