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IDT70V24L35J

Description
4K X 16 DUAL-PORT SRAM, 25 ns, CPGA84
Categorystorage   
File Size225KB,17 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

IDT70V24L35J Overview

4K X 16 DUAL-PORT SRAM, 25 ns, CPGA84

IDT70V24L35J Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals84
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage3.6 V
Minimum supply/operating voltage3 V
Rated supply voltage3.3 V
maximum access time25 ns
Processing package description1.120 × 1.120 INCH, 0.160 INCH HEIGHT, Ceramic, PGA-84
stateACTIVE
CraftsmanshipCMOS
packaging shapeSQUARE
Package SizeGRID array
Terminal formPIN/PEG
Terminal spacing2.54 mm
terminal coatingtin lead
Terminal locationPERPENDICULAR
Packaging MaterialsCeramic, Metal-SEALED COFIRED
Temperature levelCOMMERCIAL
memory width16
organize4K × 16
storage density65536 deg
operating modeASYNCHRONOUS
Number of digits4096 words
Number of digits4K
Memory IC typedual-port static random access memory
serial parallelparallel
HIGH-SPEED 3.3V
4K x 16 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT70V24S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Commercial: 25/35/55ns (max.)
• Low-power operation
— IDT70V24S
Active: 230mW (typ.)
Standby: 3.3mW (typ.)
— IDT70V24L
Active: 230mW (typ.)
Standby: .66mW (typ.)
• Separate upper-byte and lower-byte control for
multiplexed bus compatibility
• IDT70V24 easily expands data bus width to 32 bits or
more using the Master/Slave select when cascading
more than one device
• M/
S
= H for
BUSY
output flag on Master
M/
S
= L for
BUSY
input on Slave
• Busy and Interrupt Flags
• Devices are capable of withstanding greater than 2001V
electrostatic charge.
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling
between ports
• Fully asynchronous operation from either port
• LVTTL-compatible, single 3.3V (±0.3V) power supply
• Available in 84-pin PGA, 84-pin PLCC, and 100-pin
TQFP
DESCRIPTION:
The IDT70V24 is a high-speed 4K x 16 Dual-Port Static
RAM. The IDT70V24 is designed to be used as a stand-alone
64K-bit Dual-Port RAM or as a combination MASTER/SLAVE
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
UB
L
R/
W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
Control
I/O
0L
-I/O
7L
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
BUSY
L(1,2)
A
11L
A
0L
NOTES:
1. (MASTER):
BUSY
is output;
(SLAVE):
BUSY
is input.
2.
BUSY
outputs
and
INT
outputs
are non-tri-stated
push-pull.
BUSY
R(1,2)
Address
Decoder
12
MEMORY
ARRAY
12
Address
Decoder
A
11R
A
0R
CE
L
OE
L
R/
W
L
SEM
L
(2)
INT
L
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
OE
R
R/
W
R
SEM
R
INT
R(2)
M/
S
2911 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2911/3
6.38
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