LFSCM3GA40EP1-5FFA1020I datasheet, PDF

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LFSCM3GA40EP1-5FFA1020I: DescriptionFPGA - Field Programmable Gate Array 40.4K LUTs 562 I/O MACO SERDES1.2V -5SP; CategoryProgrammable logic devices Programmable logic; File Size4MB，344 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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FPGA - Field Programmable Gate Array 40.4K LUTs 562 I/O MACO SERDES1.2V -5SP

LFSCM3GA40EP1-5FFA1020I Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Lattice
Parts packaging code	BGA
package instruction	33 X 33 MM, FCBGA-1020
Contacts	1020
Reach Compliance Code	unknown
ECCN code	EAR99

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LatticeSC/M Family flexiPCS Data Sheet

DS1005 Version 02.0, June 2011

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

June 2011

Introduction to flexiPCS ..................................................................................................................... 1-1

flexiPCS™ Features........................................................................................................................................... 1-1

flexiPCS Introduction.......................................................................................................................................... 1-2

Architecture Overview ........................................................................................................................................ 1-2

flexiPCS Quad........................................................................................................................................... 1-2

flexiPCS Channel ...................................................................................................................................... 1-3

Per Channel PCS/FPGA Interface Ports................................................................................................... 1-4

Using this Data Sheet ............................................................................................................................... 1-7

SERDES Functionality/Electrical & Timing ...................................................................................... 2-1

Introduction ........................................................................................................................................................ 2-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 2-1

Quad and Channel Option Control..................................................................................................................... 2-1

Register Map Addressing.......................................................................................................................... 2-1

Auto-Configuration .................................................................................................................................... 2-3

SERDES Functionality ....................................................................................................................................... 2-4

SERDES Port Description.................................................................................................................................. 2-6

SERDES Functionality Detailed Description ...................................................................................................... 2-8

SERDES Powerup .................................................................................................................................... 2-8

Clocks & Resets........................................................................................................................................ 2-9

Rate Mode Registers .............................................................................................................................. 2-12

Locked Reference and Transmit Clocks ................................................................................................. 2-17

Transmit Clocks ...................................................................................................................................... 2-18

Receive Clocks ....................................................................................................................................... 2-18

Transmit Data.......................................................................................................................................... 2-22

Transmit Data Skew................................................................................................................................ 2-23

Receive Data........................................................................................................................................... 2-23

Low Speed SERDES Receiver Operation ....................................................................................................... 2-26

Status Interrupt Registers ................................................................................................................................ 2-27

Receive CDR Loss of Lock Interrupt Usage .................................................................................................... 2-27

flexiPCS Reset Sequences .............................................................................................................................. 2-28

flexiPCS Power Down Control Signals............................................................................................................. 2-29

SERDES Electrical & Timing Characteristics................................................................................................... 2-31

SERDES Performance............................................................................................................................ 2-31

SERDES High Speed Data Transmitter.................................................................................................. 2-31

SERDES High Speed Data Receiver...................................................................................................... 2-33

Interfacing to Reference Clock CML Buffers.................................................................................................... 2-36

SERDES Power ............................................................................................................................................... 2-37

SERDES Power Supply Sequencing Requirements............................................................................... 2-38

SERDES Power Supply Requirements............................................................................................................ 2-38

SERDES Power Supply Package Requirements............................................................................................. 2-38

Power-Down/Power-Up Specification .............................................................................................................. 2-38

8-bit and 10-bit SERDES Only Modes ............................................................................................... 3-1

Introduction ........................................................................................................................................................ 3-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 3-1

Quad and Channel Option Control..................................................................................................................... 3-1

Register Map Addressing.......................................................................................................................... 3-2

Auto-Configuration .................................................................................................................................... 3-3

8-bit SERDES Only Register Settings....................................................................................................... 3-4

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

www.latticesemi.com

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

8-bit SERDES Only Auto-Configuration Example ..................................................................................... 3-4

10-bit SERDES Only Register Settings..................................................................................................... 3-5

10-bit SERDES Only Auto-Configuration Example ................................................................................... 3-6

8-bit SERDES Only Mode .................................................................................................................................. 3-6

8-bit SERDES Only Mode Pin Description......................................................................................................... 3-8

8-bit SERDES Only Mode Detailed Description................................................................................................. 3-9

Clocks & Resets........................................................................................................................................ 3-9

Transmit Data.......................................................................................................................................... 3-11

Receive Data........................................................................................................................................... 3-14

Control & Status ...................................................................................................................................... 3-16

10-bit SERDES Only Mode .............................................................................................................................. 3-16

10-bit SERDES Only Mode Pin Description..................................................................................................... 3-18

10-bit SERDES Only Mode Detailed Description............................................................................................. 3-19

Clocks & Resets...................................................................................................................................... 3-19

Transmit Data.......................................................................................................................................... 3-21

Receive Data........................................................................................................................................... 3-24

Control & Status ...................................................................................................................................... 3-26

Generic 8b10b Mode ........................................................................................................................... 4-1

Introduction ........................................................................................................................................................ 4-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 4-1

Quad and Channel Option Control..................................................................................................................... 4-1

Register Map Addressing.......................................................................................................................... 4-2

Auto-Configuration .................................................................................................................................... 4-3

Generic 8b10b Register Settings .............................................................................................................. 4-4

Generic 8b10b Auto-Configuration Example............................................................................................. 4-5

Generic 8b10b Mode.......................................................................................................................................... 4-6

Generic 8b10b Mode Pin Description ................................................................................................................ 4-8

Generic 8b10b Mode Detailed Description ...................................................................................................... 4-10

Clocks & Resets...................................................................................................................................... 4-10

Transmit Data.......................................................................................................................................... 4-12

Receive Data........................................................................................................................................... 4-16

Control & Status ...................................................................................................................................... 4-32

Status Interrupt Registers ....................................................................................................................... 4-33

Gigabit Ethernet Mode ....................................................................................................................... 5-1

Introduction ........................................................................................................................................................ 5-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 5-1

Quad and Channel Option Control..................................................................................................................... 5-2

Register Map Addressing.......................................................................................................................... 5-2

Auto-Configuration .................................................................................................................................... 5-4

Gigabit Ethernet Register Settings............................................................................................................ 5-4

Gigabit Ethernet Auto-Configuration ......................................................................................................... 5-5

Gigabit Ethernet Mode ....................................................................................................................................... 5-6

Gigabit Ethernet Mode Pin Description .............................................................................................................. 5-7

Gigabit Ethernet Mode Detailed Description ...................................................................................................... 5-9

Clocks & Resets........................................................................................................................................ 5-9

Transmit Data.......................................................................................................................................... 5-10

Receive Data........................................................................................................................................... 5-13

Auto-Negotiation ..................................................................................................................................... 5-22

Control & Status ...................................................................................................................................... 5-25

Status Interrupt Registers ....................................................................................................................... 5-26

Fibre Channel Mode ........................................................................................................................... 6-1

Introduction ........................................................................................................................................................ 6-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 6-1

Quad and Channel Option Control..................................................................................................................... 6-2

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

Register Map Addressing.......................................................................................................................... 6-2

Auto-Configuration .................................................................................................................................... 6-4

Fibre Channel Register Settings ............................................................................................................... 6-4

Fibre Channel Auto-Configuration Example.............................................................................................. 6-5

Fibre Channel Mode........................................................................................................................................... 6-6

Fibre Channel Mode Pin Description ................................................................................................................. 6-7

Fibre Channel Mode Detailed Description ....................................................................................................... 6-10

Clocks & Resets...................................................................................................................................... 6-10

Transmit Data.......................................................................................................................................... 6-12

Receive Data........................................................................................................................................... 6-14

Control & Status ...................................................................................................................................... 6-23

Status Interrupt Registers ....................................................................................................................... 6-23

XAUI Mode ........................................................................................................................................... 7-1

Introduction ........................................................................................................................................................ 7-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 7-1

Quad and Channel Option Control..................................................................................................................... 7-1

Register Map Addressing.......................................................................................................................... 7-2

Auto-Configuration .................................................................................................................................... 7-3

XAUI Register Settings ............................................................................................................................. 7-4

XAUI Auto-Configuration Example............................................................................................................ 7-5

XAUI Mode......................................................................................................................................................... 7-6

XAUI Mode Pin Descriptions.............................................................................................................................. 7-8

XAUI Mode Detailed Description........................................................................................................................ 7-9

Clocks & Resets........................................................................................................................................ 7-9

Transmit Data.......................................................................................................................................... 7-11

Receive Data........................................................................................................................................... 7-15

Control & Status ...................................................................................................................................... 7-25

Status Interrupt Registers ....................................................................................................................... 7-26

PCI Express Mode .............................................................................................................................. 8-1

Introduction ........................................................................................................................................................ 8-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 8-1

Quad and Channel Option Control..................................................................................................................... 8-2

Register Map Addressing.......................................................................................................................... 8-2

Auto-Configuration .................................................................................................................................... 8-4

PCI Express Register Settings.................................................................................................................. 8-5

x4 PCI Express Auto-Configuration Example ........................................................................................... 8-6

PCI Express Mode ............................................................................................................................................. 8-7

PCI Express Mode Pin Description .................................................................................................................... 8-9

PCI Express Mode Detailed Description .......................................................................................................... 8-11

Clocks & Resets...................................................................................................................................... 8-11

Transmit Data.......................................................................................................................................... 8-12

Receive Data........................................................................................................................................... 8-16

Control & Status ...................................................................................................................................... 8-21

x2 PCI Express Operation....................................................................................................................... 8-22

x4 PCI Express Operation................................................................................................................................ 8-26

x4 PCI Express Operation Pin Description ...................................................................................................... 8-28

x4 PCI Express Operation Detailed Description .............................................................................................. 8-31

Clocks & Resets...................................................................................................................................... 8-31

Transmit Data.......................................................................................................................................... 8-31

Receive Data........................................................................................................................................... 8-31

x8 PCI Express Operation................................................................................................................................ 8-35

Control & Status ...................................................................................................................................... 8-37

Status Interrupt Registers ....................................................................................................................... 8-38

iii

Lattice Semiconductor

Table of Contents

LatticeSC/M Family flexiPCS Data Sheet

Serial RapidIO Mode ........................................................................................................................... 9-1

Introduction ........................................................................................................................................................ 9-1

LatticeSC flexiPCS Quad Module ............................................................................................................. 9-1

Quad and Channel Option Control..................................................................................................................... 9-2

Register Map Addressing.......................................................................................................................... 9-2

Auto-Configuration .................................................................................................................................... 9-3

Serial RapidIO Register Settings .............................................................................................................. 9-4

Serial RapidIO Auto-Configuration Example............................................................................................. 9-5

Serial RapidIO Mode.......................................................................................................................................... 9-6

1x Serial RapidIO Mode Pin Descriptions .......................................................................................................... 9-8

Serial RapidIO Mode Detailed Description......................................................................................................... 9-9

Clocks & Resets........................................................................................................................................ 9-9

Transmit Data.......................................................................................................................................... 9-12

Receive Data........................................................................................................................................... 9-15

Control & Status ...................................................................................................................................... 9-19

4x Serial RapidIO Operation ............................................................................................................................ 9-20

4x Serial RapidIO Operation Pin Description ................................................................................................... 9-22

4x Serial RapidIO Operation Detailed Description ........................................................................................... 9-23

Clocks & Resets...................................................................................................................................... 9-23

Transmit Data.......................................................................................................................................... 9-24

Receive Data........................................................................................................................................... 9-27

Control & Status ...................................................................................................................................... 9-32

Status Interrupt Registers ....................................................................................................................... 9-33

SONET Mode ..................................................................................................................................... 10-1

Introduction ...................................................................................................................................................... 10-1

LatticeSC flexiPCS Quad Module ........................................................................................................... 10-1

Quad and Channel Option Control................................................................................................................... 10-1

Register Map Addressing........................................................................................................................ 10-2

Auto-Configuration .................................................................................................................................. 10-3

SONET Register Settings ....................................................................................................................... 10-4

SONET Auto-Configuration..................................................................................................................... 10-5

SONET Mode................................................................................................................................................... 10-6

SONET Mode Pin Description.......................................................................................................................... 10-8

SONET Mode Detailed Description.................................................................................................................. 10-9

Clocks & Resets...................................................................................................................................... 10-9

Transmit Data........................................................................................................................................ 10-11

Receive Data......................................................................................................................................... 10-15

Control & Status .................................................................................................................................... 10-25

Status Interrupt Registers ..................................................................................................................... 10-26

Multi-Channel Alignment ................................................................................................................. 11-1

Introduction ...................................................................................................................................................... 11-1

Supported Protocols......................................................................................................................................... 11-2

Alignment Within A Quad ................................................................................................................................. 11-4

Alignment Between Quads............................................................................................................................. 11-13

Alignment Between Two Devices................................................................................................................... 11-19

Synchronization of Aligned Channels Across Two Devices.................................................................. 11-20

Status Interrupt Registers ..................................................................................................................... 11-21

flexiPCS Testing .............................................................................................................................. 12-1

Introduction ...................................................................................................................................................... 12-1

Near-End Loopback Modes ............................................................................................................................. 12-1

Far-End Loopback Modes................................................................................................................................ 12-2

PRBS Generator and Checker......................................................................................................................... 12-4

Memory Map ..................................................................................................................................... 13-1

LatticeSC flexiPCS Memory Map..................................................................................................................... 13-1

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