MC9S12GC64CFAE datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> MC9S12GC64CFAE

MC9S12GC64CFAE: Description16-bit Microcontrollers - MCU 9S12C64 (KOI); CategoryThe embedded processor and controller Microcontrollers and processors; File Size5MB，690 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

Download Datasheet Parametric View All

MC9S12GC64CFAE Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	MC9S12GC64CFAE	-	-	View	Buy Now

MC9S12GC64CFAE Overview

16-bit Microcontrollers - MCU 9S12C64 (KOI)

MC9S12GC64CFAE Parametric

Parameter Name	Attribute value
Brand Name	Freescale
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	QFP
package instruction	PLASTIC, LQFP-48
Contacts	48
Reach Compliance Code	compliant
ECCN code	EAR99
Is Samacsys	N
Has ADC	YES
Other features	ALSO REQUIRES 5V SUPPLY
Address bus width
bit size	16
maximum clock frequency	50 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G48
JESD-609 code	e3
length	7 mm
Humidity sensitivity level	3
Number of I/O lines	31
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	25 MHz
Maximum supply voltage	2.75 V
Minimum supply voltage	2.35 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	7 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

Preview

Download Datasheet

View All

MC9S12C Family

MC9S12GC Family

Reference Manual

HCS12

Microcontrollers

MC9S12C128

Rev 01.24

05/2010

freescale.com

Chapter 1

MC9S12C and MC9S12GC Device Overview (MC9S12C128)

1.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

1.1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

1.1.2 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

1.1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

1.2.1 Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

1.2.2 Detailed Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

1.2.3 Part ID Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

1.3.1 Device Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

1.3.2 Signal Properties Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

1.3.3 Pin Initialization for 48- and 52-Pin LQFP Bond Out Versions . . . . . . . . . . . . . . . . . . . 49

1.3.4 Detailed Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

1.3.5 Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

System Clock Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

1.5.1 Chip Conﬁguration Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

1.5.2 Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

1.5.3 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Resets and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

1.6.1 Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

1.6.2 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Device Speciﬁc Information and Module Dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

1.7.1 PPAGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

1.7.2 BDM Alternate Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

1.7.3 Extended Address Range Emulation Implications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

1.7.4 VREGEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

1.7.5 V

DD1

, V

DD2

, V

SS1

, V

SS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

1.7.6 Clock Reset Generator And VREG Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

1.7.7 Analog-to-Digital Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

1.7.8 MODRR Register Port T And Port P Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

1.7.9 Port AD Dependency On PIM And ATD Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Recommended Printed Circuit Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

1.2

1.3

1.4

1.5

1.6

1.7

1.8

Chapter 2

Port Integration Module (PIM9C32) Block Description

2.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

2.1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Freescale Semiconductor

MC9S12C-Family / MC9S12GC-Family

Rev 01.24

Recommended Resources

Harmonic current phase failure protection circuit 2b

HT-680／HT-6187／HT-600／HT-6207／HT-640／HT-6247电路-c

Kilowatt level full-bridge conversion switching power supply circuit

Safety constant current source circuit

Electronic fresh-keeping and disinfection cabinet circuit

line status indicator

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components