Z8023010PSC datasheet, PDF - EEWORLD Datasheet

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Z8023010PSC: DescriptionNetwork Controller u0026 Processor ICs 10MHz CMOS ESCC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size25KB，2 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/

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Z8023010PSC Overview

Network Controller u0026 Processor ICs 10MHz CMOS ESCC

Z8023010PSC Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Zilog, Inc.
Parts packaging code	DIP
package instruction	DIP, DIP40,.6
Contacts	40
Reach Compliance Code	unknown
Other features	MODEM CONTROL I/OS USABLE AS GENERAL PURPOSE I/OS; 10 X 19 FRAME STATUS FIFO
Address bus width	8
boundary scan	NO
maximum clock frequency	10 MHz
letter of agreement	ASYNC, BIT; SYNC, HDLC; SYNC, SDLC; BISYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.3125 MBps
External data bus width	8
JESD-30 code	R-PDIP-T40
JESD-609 code	e0
length	52.325 mm
low power mode	NO
Number of DMA channels
Number of I/O lines
Number of serial I/Os	2
Number of terminals	40
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP40,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.24 mm
Maximum slew rate	12 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL

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Z i LO G

The ZiLOG Family of Serial

Communication Controllers

Setting the standards for SCCs

Over the last 20 years ZiLOG has set the standard for

SCCs. Built from the industry acclaimed Serial

Communication Controller core, ZiLOG offers a wide

selection of (SCCs) based on your application require-

ments.

Reducing the need for external logic

ZiLOG’s SCCs offer low power consumption, higher per-

formance, and superior noise immunity. The many

on-chip features offered in our SCCs help dramatically to

reduce the need for external logic found with much of the

competition. Go with an SCC you can trust, and make

ZiLOG your one-stop SCC solution provider.

• Ability to accommodate a crystal oscillator,

baud rate generator, and digital phase-locked

loop on each channel

• Processing speeds up to 5 Mbps

• Multi-protocol format (async, monosync,

bisync, SDLC/HDLC, SDLC/HDLC loop)

• Encodes in the following modes: NRZI, FM0,

FM1, and Manchester

• CRC-16 or CRC-CCITT error detection

• 4-byte transmit FIF0/8-byte receive FIF0

Offering a fully integrated solution

The standard serial and integrated communications con-

trollers, Z85C30 and Z16C35, allow you to easily imple-

ment a fully integrated solution for many networking

applications. The chips’ features include:

• Dual full-duplex channels

• Ability to accommodate a crystal oscillator, baud

rate generator, and digital phase-locked

loop on each channel

• Processing speeds up to 4 Mbps

• Multi-protocol format (async, monosync,

bisync, SDLC/HDLC, SDLC/HDLC loop)

• Encodes in the following modes: NRZ, NRZI,

FM0, FM1, and Manchester

• CRC-16 or CRC-CCITT error detection

• 1-byte transmit FIF0/3-byte receive FIF0

• 2 transmit and 2 receive DMA channels (16C35 only)

Increasing speed

The standard and integrated universal serial con-

trollers Z16C30, Z16C35, and Z16C32 offer faster

performance. Features include:

• Dual full-duplex channels (Z16C30)

• Single full-duplex channel (Z16C32)

• Accommodates two baud rate generators

and one digital phase-locked loop

(on each channel)

• 2 DMA control signals per channel

(Z80C30/Z85C30 only)

(Continued on back side)

Simplifying software

The enhanced dual and mono SCCs Z80230, Z85230, and

Z85233, include many features that make programming

easy. These parts also reduce CPU overhead, allowing the

programmer to select packet handling response and

improve cycle access recovery time. Features include:

• Dual full-duplex channels (Z80230/Z85230)

• Single full-duplex channel (Z85233 only)

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