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74ACT02MTC

Description
Logic Gates Qd 2-Input NOR Gate
Categorylogic    logic   
File Size296KB,10 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74ACT02MTC Overview

Logic Gates Qd 2-Input NOR Gate

74ACT02MTC Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Reach Compliance Codeunknown
seriesACT
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNOR GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Sup10 ns
propagation delay (tpd)10 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74AC02, 74ACT02 — Quad 2-Input NOR Gate
January 2008
74AC02, 74ACT02
Quad 2-Input NOR Gate
Features
I
CC
reduced by 50% on 74AC02 only
Outputs source/sink 24mA
ACT02 has TTL-compatible inputs
General Description
The AC02/ACT02 contains four, 2-input NOR gates.
Ordering Information
Order Number
74AC02SC
74AC02SJ
74AC02MTC
74AC02PC
74ACT02SC
74ACT02MTC
Package
Number
M14A
M14D
MTC14
N14A
M14A
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
A
n
, B
n
O
n
Inputs
Outputs
Description
©1988 Fairchild Semiconductor Corporation
74AC02, 74ACT02 Rev. 1.5.1
www.fairchildsemi.com

74ACT02MTC Related Products

74ACT02MTC 74ACT02MTCX 74ACT02MTC_Q
Description Logic Gates Qd 2-Input NOR Gate Logic Gates Qd 2-Input NOR Gate Logic Gates Qd 2-Input NOR Gate
Is it Rohs certified? conform to conform to -
Maker Fairchild Fairchild -
Parts packaging code TSSOP TSSOP -
package instruction TSSOP, TSSOP14,.25 TSSOP, TSSOP14,.25 -
Contacts 14 14 -
Reach Compliance Code unknown unknown -
series ACT ACT -
JESD-30 code R-PDSO-G14 R-PDSO-G14 -
JESD-609 code e3 e3 -
length 5 mm 5 mm -
Load capacitance (CL) 50 pF 50 pF -
Logic integrated circuit type NOR GATE NOR GATE -
MaximumI(ol) 0.024 A 0.024 A -
Humidity sensitivity level 1 1 -
Number of functions 4 4 -
Number of entries 2 2 -
Number of terminals 14 14 -
Maximum operating temperature 85 °C 85 °C -
Minimum operating temperature -40 °C -40 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code TSSOP TSSOP -
Encapsulate equivalent code TSSOP14,.25 TSSOP14,.25 -
Package shape RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH -
Peak Reflow Temperature (Celsius) 260 260 -
power supply 5 V 5 V -
Prop。Delay @ Nom-Sup 10 ns 10 ns -
propagation delay (tpd) 10 ns 10 ns -
Certification status Not Qualified Not Qualified -
Schmitt trigger NO NO -
Maximum seat height 1.2 mm 1.2 mm -
Maximum supply voltage (Vsup) 5.5 V 5.5 V -
Minimum supply voltage (Vsup) 4.5 V 4.5 V -
Nominal supply voltage (Vsup) 5 V 5 V -
surface mount YES YES -
technology CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL -
Terminal surface Matte Tin (Sn) Matte Tin (Sn) -
Terminal form GULL WING GULL WING -
Terminal pitch 0.65 mm 0.65 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
width 4.4 mm 4.4 mm -
Base Number Matches 1 1 -

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