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74AUP2G38GM125

Description
Logic Gates 1.8V DUAL LP 2-INPT
Categorysemiconductor    logic   
File Size873KB,21 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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Logic Gates 1.8V DUAL LP 2-INPT

74AUP2G38GM125 Parametric

Parameter NameAttribute value
Product CategoryLogic Gates
ManufacturerNXP
RoHSDetails
Logic FamilyAUP
Number of Gates2 Gate
Number of Input Lines2 Input
Number of Output Lines1 Output
Low Level Output Current4 mA
Propagation Delay Time19.5 ns
Supply Voltage - Max3.6 V
Supply Voltage - Min0.8 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 125 C
Mounting StyleSMD/SMT
Package / CaseXQFN8U
PackagingReel
FunctionNAND
Height0.45 mm
Length1.6 mm
Logic TypeCMOS
Operating Supply Voltage1.8 V, 2.5 V, 3.3 V
Output TypeOpen Drain
Factory Pack Quantity4000
Width1.6 mm
74AUP2G38
Low-power dual 2-input NAND gate; open drain
Rev. 8 — 11 February 2013
Product data sheet
1. General description
The 74AUP2G38 provides the dual 2-input NAND gate with open-drain output. The output
of the device is an open drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD78B Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
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