MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MPIC2112/D
Power Products Division
HIGH AND LOW SIDE DRIVER
The MPIC2112 is a high voltage, high speed, power MOSFET and IGBT driver
with independent high and low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction.
Logic inputs are compatible with standard CMOS or LSTTL outputs. The output
drivers feature a high pulse current buffer stage designed for minimum driver
cross–conduction. Propagation delays are matched to simplify use in high frequen-
cy applications. The floating channel can be used to drive an N–channel power
MOSFET or IGBT in the high side configuration which operates from 10 to 600
volts.
MPIC2112
HIGH AND LOW
SIDE DRIVER
14
1
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•
•
•
•
•
•
•
•
•
•
•
•
Floating Channel Designed for Bootstrap Operation
Fully Operational to +600 V
Tolerant to Negative Transient Voltage
dV/dt Immune
Gate Drive Supply Range from 10 to 20 V
Undervoltage Lockout for Both Channels
Separate Logic Supply
Operating Supply Range from 5 to 20 V
Logic and Power Ground Operating Offset Range from –5 to +5 V
CMOS Schmitt–triggered Inputs with Pull–down
Cycle by Cycle Edge–triggered Shutdown Logic
Matched Propagation Delay for Both Channels
Outputs in Phase with Inputs
P SUFFIX
PLASTIC PACKAGE
CASE 646–06
16
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–02
SOIC – WIDE
ORDERING INFORMATION
Device
MPIC2112DW
MPIC2112P
Package
SOIC WIDE
PDIP
PRODUCT SUMMARY
VOFFSET
IO+/–
VOUT
ton/off (typical)
Delay Matching
600 V MAX
200 mA/400 mA
10 – 20 V
125 & 105 ns
30 ns
PIN CONNECTIONS
(TOP VIEW)
8
9
10
11
12
13
14
VDD
HIN
SD
LIN
VSS
VCC
COM
LO
HO
VB
VS
7
6
5
4
3
2
1
9
10
11
12
13
14
15
16
14 LEADS PDIP MPIC2112P
16 LEADS SOIC (WIDE BODY)
MPIC2112DW
VDD
HIN
SD
LIN
VSS
VCC
COM
LO
HO
VB
VS
8
7
6
5
4
3
2
1
©
Motorola Power
Motorola, Inc. 1996
Products Division Technical Data
1
MPIC2112
SIMPLIFIED BLOCK DIAGRAM
VB
VDD
R Q
S
HIN
VDD/VCC
LEVEL
SHIFT
HV
LEVEL
SHIFT
PULSE
GEN
UV
DETECT
PULSE
FILTER
R
R
S
Q
HO
VS
VCC
SD
UV
DETECT
LIN
S
R Q
VSS
VDD/VCC
LEVEL
SHIFT
LO
DELAY
COM
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.
Rating
High Side Floating Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient
*Package Power Dissipation @ TA
≤
+25°C
Thermal Resistance, Junction to Ambient
Operating and Storage Temperature
Lead Temperature for Soldering Purposes, 10 seconds
(14 Lead DIP)
(16 SOIC–WIDE)
(14 Lead DIP)
(16 SOIC–WIDE)
Symbol
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVS/dt
PD
–
R
θJA
Tj, Tstg
TL
Min
–0.3
VB–25
VS–0.3
–0.3
–0.3
–0.3
VCC–25
VSS–0.3
–
–
–
–
–
–55
–
Max
625
VB+0.3
VB+0.3
25
VCC+0.3
VSS+25
VCC+0.3
VDD+0.3
50
1.6
1.25
75
100
150
260
Unit
VDC
V/ns
Watt
°C/W
°C
°C
RECOMMENDED OPERATING CONDITIONS
The Input/Output logic timing Diagram is shown in Figure 1. For proper operation the device should be used within the recommended condi-
tions. The VS and VSS offset ratings are tested with all supplies biased at 15 V differential.
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Ambient Temperature
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
VS+10
Note 1
VS
10
0
VSS+5
–5
VSS
–40
VS+20
600
VB
20
VCC
VSS+20
5
VDD
125
°C
V
TA
Note 1: Logic operational for VS of –5 to +600 V. Logic state held for VS of –5 V to –VBS.
2
Motorola Power Products Division Technical Data
MPIC2112
ELECTRICAL CHARACTERISTICS
(TC = 25°C unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
STATIC ELECTRICAL CHARACTERISTICS – SUPPLY CHARACTERISTICS
VBIAS (VCC, VBS, VDD) = 15 V and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are
applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM or VSS and are applicable to
the respective output leads: HO or LO.
Logic “1” Input Voltage
Logic “0” Input Voltage
High Level Output Voltage, VBIAS–VO @ VIN = VIH, IO = 0 A
Low Level Output Voltage, VO @ VIN = VIL, IO = 0 A
Offset Supply Leakage Current @ VB = VS = 600 V
Quiescent VBS Supply Current @ VIN = 0 V or VDD
Quiescent VCC Supply Current @ VIN = 0 V or VDD
Quiescent VDD Supply Current @ VIN = 0 V or VDD
Logic “1” Input Bias Current @ VIN = 15 V
Logic “0” Input Bias Current @ VIN = 0 V
VBS Supply Undervoltage Positive Going Threshold
VBS Supply Undervoltage Negative Going Threshold
VCC Supply Undervoltage Positive Going Threshold
VCC Supply Undervoltage Negative Going Threshold
Output High Short Circuit Pulsed Current
@ VOUT = 0 V, VIN = 15 V, PW
≤10 µs
Output Low Short Circuit Pulsed Current
@ VOUT = 15 V, VIN = 0 V, PW
≤
10
µs
VIH
VIL
VOH
VOL
ILK
IQBS
IQCC
IQDD
IIN+
IIN–
VBSUV+
VBSUV–
VCCUV+
VCCUV–
IO+
IO–
9.5
–
–
–
–
–
–
–
–
–
7.4
7.0
7.6
7.2
200
420
–
–
–
–
–
25
80
2.0
20
–
–
–
–
–
250
500
–
6.0
100
100
50
60
180
5.0
40
1.0
9.6
9.2
9.6
9.2
mA
–
–
V
µA
mV
V
DYNAMIC ELECTRICAL CHARACTERISTICS
VBIAS (VCC, VBS, VDD) = 15 V and VSS = COM unless otherwise specified. TA = 25°C.
Turn–On Propagation Delay @ VS = 0 V
Turn–Off Propagation Delay @ VS = 600 V
Shutdown Propagation Delay @ VS = 600 V
Turn–On Rise Time @ CL = 1000 pF
Turn–Off Fall Time @ CL = 1000 pF
Delay Matching, HS & LS Turn–On/Off
ton
toff
tsd
tr
tf
MT
–
–
–
–
–
–
125
105
105
80
40
–
180
160
160
130
65
30
ns
TYPICAL CONNECTION
10 TO 600 V
VDD
HIN
SD
LIN
VSS
VCC
VDD
HIN
SD
LIN
VSS
HO
VB
VS
VCC
COM
LO
TO
LOAD
Motorola Power Products Division Technical Data
3
MPIC2112
LEAD DEFINITIONS
Symbol
VDD
HIN
SD
LIN
VSS
VB
HO
VS
VCC
LO
COM
Logic Supply
Logic Input for High Side Gate Driver Output (HO), In Phase
Logic Input for Shutdown
Logic Input for Low Side Gate Driver Output (LO), In Phase
Logic Ground
High Side Floating Supply
High Side Gate Drive Output
High Side Floating Supply Return
Low Side Supply
Low Side Gate Drive Output
Low Side Return
Lead Description
HIN
LIN
HIN
LIN
ton
50%
tr
90%
50%
toff
90%
10%
tf
SD
HO
LO
HO
LO
10%
Figure 1. Input / Output Timing Diagram
Figure 2. Switching Time Waveform
Definitions
50%
SD
tsd
HO
LO
90%
HIN
LIN
50%
50%
LO
HO
10%
MT
90%
LO
MT
HO
Figure 3. Deadtime Waveform Definitions
Figure 4. Delay Matching Waveform
Definitions
4
Motorola Power Products Division Technical Data
MPIC2112
PACKAGE DIMENSIONS
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0
_
10
_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0
_
10
_
0.39
1.01
14
8
B
1
7
A
F
C
N
H
G
D
SEATING
PLANE
L
J
K
M
CASE 646–06
ISSUE L
–A–
16
9
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS
MIN
MAX
10.15
10.45
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0
_
7
_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.400
0.411
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0
_
7
_
0.395
0.415
0.010
0.029
–B–
1
8
8X
P
0.010 (0.25)
M
B
M
16X
D
M
J
T A
S
0.010 (0.25)
B
S
F
R
X 45
_
C
–T–
14X
DIM
A
B
C
D
F
G
J
K
M
P
R
G
K
SEATING
PLANE
M
CASE 751G–02
ISSUE A
Motorola Power Products Division Technical Data
5
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