A/D, D/C Converters for Image Signal Processing
MN6577F, MN6577H
Low Power 10-Bit 3-Volt CMOS A/D Converters for Image Processing
Overview
The MN6577F and MN6577H are high-speed 10-bit
CMOS analog-to-digital converters for image process-
ing applications.
They use a half flash structure based on chopper com-
parators to achieve both high speed and low power con-
sumption, and operate on a single 3 volt power supply.
Pin Assignment
MN6577F
MN6577H
TQFP048-P-0707
QFH048-P-0707
N.C.
V
RBS
V
RB
V
R3
V
R2
V
R1
V
RT
V
RTS
N.C.
AV
SS
AV
DD
AV
DD
N.C.
AV
DD
V
IN
N.C.
N.C.
N.C.
AV
SS
DV
SS
DV
DD
LINDF
OVF
N.C.
37
38
39
40
41
42
43
44
45
46
47
48
Features
Maximum conversion rate: 15 MSPS (min.)
Linearity error:
±1.3
LSB (typ.)
Differential linearity error:
±0.5
LSB (typ.)
Power supply voltage: 3.0 V
Power consumption: 40 mW (typ.) (f
CLK
=15 MHz)
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
Applications
Digital television
Digital video equipment
Digital image processing equipment
D0
D1
D2
D3
D4
DV
SS
DV
DDL
D5
D6
D7
D8
D9
1
2
3
4
5
6
7
8
9
10
11
12
POWD
NOE
CLK
MINV
LINV
N.C.
DV
DD
DV
SS
DV
SS
DV
DD
TEST1
TEST2
(TOP VIEW)
1
2
45
DV
DD
UNDF
46
Block Diagram
OVF
44 DV
SS
43 AV
SS
47
D0
(LSB)
39 V
IN
38 AV
DD
1
D1
2
MN6577F, MN6577H
D2
3
31
35
V
RBS
V
RB
V
R3
34
33
31
Upper comparator (5 bits)
Encoder (5 bits)
D3 4
5
D4
6
DV
SS
7
DV
DDL
D5
8
D6
9
D7
D8
10
11
32 V
R2
31
V
R1
30
V
RT
29 V
RTS
Clock generator
5
Lower comparator (5 bits)
Lower encoder (5 bits)
27
29
57
AV
SS
26 AV
DD
25 AV
DD
21
20
MINV
(
LINV
5
Error
correction
and
data latch
12
D9
13
TEST2
14
TEST1
15
DV
DD
16
DV
SS
17
DV
SS
18
DV
DD
22
CLK
NOE 23
24
POWD
A/D, D/C Converters for Image Signal Processing
Pins 19, 28, 36, 37, 40, 41, 42,
and 48 are no connention pins.
)
A/D, D/C Converters for Image Signal Processing
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Symbol
D0
D1
D2
D3
D4
DV
SS
DV
DD
D5
D6
D7
D8
D9
TEST2
TEST1
DV
DD
DV
SS
DV
SS
DV
DD
N.C.
LINV
MINV
CLK
NOE
POWD
AV
DD
AV
DD
AV
SS
N.C.
V
RTS
V
RT
V
R1
V
R2
V
R3
V
RB
V
RBS
N.C.
N.C.
AV
DD
V
IN
N.C.
Function Description
Digital code output (LSB)
Digital code output
Digital code output
Digital code output
Digital code output
Ground for digital circuits
Power supply for digital circuits
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output (MSB)
Test mode selection pin
Test mode selection pin
Power supply for digital circuits
Ground for digital circuits
Ground for digital circuits
Power supply for digital circuits
No connection
Output inversion pin
Output inversion pin
Sampling clock
Digital output enable pin
Power down mode selection pin
Power supply for analog circuits
Power supply for analog circuits
Ground for analog circuits
No connection
Reference voltage power supply (TOP)
Reference voltage input (TOP)
Intermediate reference voltage
Intermediate reference voltage
Intermediate reference voltage
Reference voltage input (BOTTOM)
Reference voltage power supply (BOTTOM)
No connection
No connection
Power supply for analog circuits
Analog signal input
No connection
MN6577F, MN6577H
3
MN6577F, MN6577H
Pin Description (continued)
Pin No.
41
42
43
44
45
46
47
48
Symbol
N.C.
N.C.
AV
SS
DV
SS
DV
DD
UNDF
OVF
N.C.
A/D, D/C Converters for Image Signal Processing
Function Description
No connection
No connection
Ground for analog circuits
Ground for digital circuits
Power supply for digital circuits
Underflow output
Overflow output
No connection
Ta=25˚C
Absolute Maximum Ratings
Parameter
Power supply voltage
Input voltage
Output voltage
Operating ambient temperature
Storage temperature
Parameter
Power supply voltage
Digital input
voltage
Reference
voltage
Clock
"H" level
"L" level
"H" level
"L" level
"H" level pulse width
"L" level pulse width
Symbol
V
DD
V
I
V
O
T
opr
T
stg
Symbol
V
DD
V
IH
V
IL
V
RT
V
RB
t
WH
t
WL
V
AIN
min
2.85
2.4
V
SS
2.0
V
SS
30
30
V
SS
Rating
– 0.3 to +7.0
– 0.3 to V
DD
+0.3
– 0.3 to V
DD
+0.3
–20 to +70
–55 to +125
typ
3.00
max
3.30
V
DD
0.8
V
DD
1.0
Unit
V
V
V
˚C
˚C
Unit
V
V
V
V
V
ns
ns
V
DD
V
max
72
Unit
mW
bit
±2.5
±1.0
LSB
LSB
MSPS
15
V
RT
– V
RB
–1.5
MHz
V
mA
mA
20
18
7
40
ns
pF
ns
Recommended Operating Conditions
V
DD
=AV
DD
=DV
DD
=3.0V, V
SS
=AV
SS
=DV
SS
=0V, Ta=25˚C
Analog input voltage
Electrical Characteristics
Parameter
Power consumption
Resolution
Linearity error
Differential linearity error
Maximum conversion rate
Clock frequency
Analog input dynamic range
Output
current
"H" level
"L" level
V
DD
=AV
DD
=DV
DD
=3.0V, AV
SS
=DV
SS
=0V, Ta=25˚C
Symbol
Conditions
P
C
F
C
=15MSPS
(not including reference current)
RES
E
L
E
D
F
C(max.)
f
CLK
D
R
I
OH
I
OL
t
d
C
I
t
sd
V
OH
=V
DD
– 0.8V
V
OL
=0.4V
C
L
=20pF
f
CLK
=15MSPS
V
RT
=3.0V
V
BB
=1.0V
min
typ
39
10
±1.3
±0.5
15
1
2
1.5
10
Output delay time
Analog input capacitance
Sampling delay
4
A/D, D/C Converters for Image Signal Processing
Timing Chart
MN6577F, MN6577H
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
t
WH
Clock
t
WL
Analog input
N
t
sd
(7ns)
N+1
N–2
t
d
(20ns)
N+2
N–1
N+3
N
N+4
N+1
Data output
N–3
Note: The circles indicate analog signal sampling points.
5
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