20-pin SOIC-W, 19 Bussed Resistors; 100% tin (Pb-free) terminations
Absolute TCR Code
00 = ±250ppm/°C; 01 = ±100ppm/°C
02 = ±50ppm/°C; 03 = ±25ppm/°C
Resistance Code
4-Digit Resistance Code
Ex: 1002 = 10K , 50R1 = 50.1
(The USA style coding shown is preferred, but, historically, European style coding (e.g. 10K) may have been used.)
Absolute Tolerance Code
J = ±5%; G = ±2%; F = ±1%; D = ±0.5%
C = ±0.25%; B = ±0.1%
Optional Ratio Tolerance Code
G = ±2%; F = ±1%; D = ±0.5%;
C = ±0.25%; B = ±0.1%; A = ±0.05%
Packaging
Specify tubes or tape & reel.
Tape and reel packaging is compliant with EIA-481-D: 8 mm through 200 mm Embossed Carrier Taping and 8 mm and 12 mm Punched Carrier Taping of Surface Mount Components
for Automatic Handling.
Tube packaging drawing detail available upon request.
I saw that some pins of the FPGA's jtag interface need to be connected to pull-up resistors. Do the CPLD's jtag interface also need to be connected to pull-up resistors? I use EPM570......
The PCB is smaller than expected. The plan was to place the interfaces on both sides. In the actual layout, it was found that the interfaces do not take up much space and can be placed on the right si...
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:00[/i] [b][font=宋体][size=10.5pt]Time[/size][/font][/b][font=宋体][size=10.5pt]: May 6-8, 2008[/size][/font] [b][font=宋体][size=10.5pt]Loca...
[size=4]There are many STM32 SHT1X temperature and humidity monitoring programs on the Internet, most of which have problems and many people are asking for advice. Now I will share my successful test ...
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