MM74HC148 8-3 Line Priority Encoder
October 1987
Revised February 1999
MM74HC148
8-3 Line Priority Encoder
General Description
The MM74HC148 priority encoder utilizes advanced sili-
con-gate CMOS technology. It has the high noise immunity
and low power consumption typical of CMOS circuits, as
well as the speeds and output drive similar to LB-TTL.
This priority encoder accepts 8 input request lines 0–7 and
outputs 3 lines A0–A2. The priority encoding ensures that
only the highest order data line is encoded. Cascading cir-
cuitry (enable input EI and enable output EO) has been
provided to allow octal expansion without the need for
external circuitry. All data inputs and outputs are active at
the low logic level.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground.
Features
s
Typical propagation delay: 13 ns
s
Wide supply voltage range: 2V–6V
Ordering Code:
Order Number
MM74HC148M
MM74HC148MTC
MM74HC148N
Package Number
M16A
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and TSSOP
Truth Table
Inputs
H X X X X X X X X H
L H H H H H H H H H
L X X X X X X X L
L X X X X X X L H
L X X X X X L H H
L X X X X L H H H
L
L
L
L
Outputs
H
H
L
L
H
H
L
L
H
H
H
H
L
H
L
H
L
H
L
H
H
H
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
L X X X L H H H H H
L X X L H H H H H H
L X L H H H H H H H
L L H H H H H H H H
H
=
HIGH
L
=
LOW
X
=
Irrelevant
© 1999 Fairchild Semiconductor Corporation
DS009390.prf
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MM74HC148
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current, per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260°C
600 mW
500 mW
−0.5
to
+7.0V
−1.5
to V
CC
+1.5V
−0.5
to V
CC
+0.5V
±20
mA
±25
mA
±50
mA
−65°C
to
+150°C
Recommended Operation
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
1000
500
400
ns
ns
ns
0
−40
V
CC
+85
V
°C
2
Max
6
Units
V
Note 1:
Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating—plastic “N” package:
−12
mW/°C from 65°C to 85°C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
20
µA
Conditions
(Note 4)
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0
4.5
6.0
4.7
5.2
0
0
0
0.2
0.2
T
A
=
25°C
Typ
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.96
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
8.0
T
A
= −40
to 85°C T
A
= −55
to 125°C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
80
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1.0
160
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
4.0 mA
|I
OUT
|
≤
5.2 mA
V
OL
Maximum LOW Level
Output Voltage
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
20
µA
2.0V
4.5V
6.0V
V
IN
=
V
IH
or V
IL
|I
OUT
|
≤
4.0 mA
|I
OUT
|
≤
5.2 mA
I
IN
I
CC
Maximum Input
Current
Maximum Quiescent
Supply Current
V
IN
=
V
CC
or GND
I
OUT
=
0
µA
6.0V
V
IN
=
V
CC
or GND
4.5V
6.0V
6.0V
4.5V
6.0V
Note 4:
For a power supply of 5V
±10%
the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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4
MM74HC148
AC Electrical Characteristics
Symbol
t
PHL
, t
PLH
Parameter
Maximum Propagation Delay,
Any Input to Any Output
Conditions
Typ
14
Guaranteed
Limits
Units
ns
AC Electrical Characteristics
V
CC
= 2.0V to 6.0V, C
L
= 50 pF, t
r
= t
f
= 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
52
5
10
10
10
7
12
12
17
17
15
14
T
A
=
25°C
Typ
140
28
24
140
28
24
160
32
27
160
32
27
100
20
17
100
20
17
75
15
13
T
A
= −40°C
to
+85°C
T
A
= −55°C
to
+125°C
Guaranteed Limits
175
35
30
175
35
30
200
40
34
200
40
34
125
25
21
125
25
21
95
19
16
210
42
36
210
42
36
240
48
41
240
48
41
150
30
26
150
30
26
110
22
19
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
t
PHL
, t
PLH
Inputs 0–7
to Outputs
A0, A1, A2
t
PHL
, t
PLH
Inputs 0–7
to
Output EO
t
PHL
, t
PLH
Inputs 0–7
to
Output GS
t
PHL
, t
PLH
Input EI
to Outputs
A0, A1, A2
t
PHL
, t
PLH
Input EI
to
Output GS
t
PHL
, t
PLH
Input EI
to
Output EO
t
f
, t
r
Maximum
Output Rise
and Fall Time
C
pd
C
in
Power Dissipation
Capacitance (Note 5)
Maximum Input
Capacitance
Note 5:
C
pd
determines the no load dynamic power consumption, and the no load dynamic current consumption.
5
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