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MM74C905N

Description
CMOS SERIES, 1-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
Categorylogic    logic   
File Size74KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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MM74C905N Overview

CMOS SERIES, 1-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24

MM74C905N Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeDIP
package instruction0.600 INCH, PLASTIC, MS-011, DIP-24
Contacts24
Reach Compliance Codeunknow
Other featuresSUCCESSIVE APPROXIMATION REGISTER
Counting directionRIGHT
seriesCMOS
JESD-30 codeR-PDIP-T24
JESD-609 codee3
length31.915 mm
Logic integrated circuit typeSERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Su2000000 Hz
Number of digits12
Number of functions1
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.6
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT APPLICABLE
power supply5/15 V
propagation delay (tpd)350 ns
Certification statusNot Qualified
Maximum seat height5.334 mm
Maximum supply voltage (Vsup)15 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT APPLICABLE
Trigger typePOSITIVE EDGE
width15.24 mm
minfmax5 MHz
MM74C905 12-Bit Successive Approximation Register
October 1987
Revised January 1999
MM74C905
12-Bit Successive Approximation Register
General Description
The MM74C905 CMOS 12-bit successive approximation
register contains all the digit control and storage necessary
for successive approximation analog-to-digital conversion.
Because of the unique capability of CMOS to switch to
each supply rail without any offset voltage, it can also be
used in digital systems as the control and storage element
in repetitive routines.
Features
s
Wide supply voltage range:
s
Guaranteed noise margin:
s
High noise immunity:
3.0V to 15V
1.0V
Fan out of 2 driving 74L
0.45 V
CC
(typ)
s
Low power TTL compatibility:
s
Provision for register extension or truncation
s
Operates in START/STOP or continuous conversion
mode
s
Drive ladder switches directly. For 10 bits or less with
50k/100k R/2R ladder network
Ordering Code:
Order Number
MM74C905N
Package Number
N24A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Connection Diagram
Pin Assignments for DIP
© 1999 Fairchild Semiconductor Corporation
DS005910.prf
www.fairchildsemi.com

MM74C905N Related Products

MM74C905N MM74C905
Description CMOS SERIES, 1-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24 CMOS SERIES, 1-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP24
series CMOS CMOS
Number of digits 12 1
Number of functions 1 12
Number of terminals 24 24
Maximum operating temperature 85 °C 85 Cel
Minimum operating temperature -40 °C -40 Cel
Output polarity TRUE TRUE
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form THROUGH-HOLE THROUGH-HOLE
Terminal location DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE

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