Distributed Arithmetic FIR (DA-FIR)
Page 1 of 3
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Distributed Arithmetic FIR (DA-FIR) Filter Generator
Overview
The Lattice Distributed Arithmetic Finite Impulse Response (DA-FIR) Filter Generator IP
implements a highly configurable, multi-channel DA-FIR filter, using distributed
arithmetic algorithms implemented in FPGA Look Up Table (LUT) or Embedded Block
Memory (EBR) to efficiently support the sum-of-product calculations required to perform
the filter function. These techniques generate very area-efficient utilization of the FPGA
LUTs while enabling savings of multiply-accumulate blocks (sysDSP) for other design logic. As a result, the DA-FIR Filter
Generator IP core is extremely useful for implementing custom DSP blocks in Lattice FPGAs. Please refer to the user's guide to
determine which cores are available for each device family.
Features
Variable number of taps up to 1024
Multi-channel support (up to 32 channels)
Polyphase interpolation/decimation filters
Halfband filters
Interpolation and Decimation ratios from 2 to 32
Input data widths from 4 to 32 bits
Coefficient widths from 4 to 32 bits
Signed or unsigned data and coefficients
Selectable rounding: truncation, rounding away from zero,
convergent rounding
Optional saturation logic for overflow handling
Full precision arithmetic
Specification of fractional inputs and outputs
Support for both serial and parallel filters, with user
specified degree of parallelism.
Configurable pipelining to increase performance
Optimizations based on filter characteristics (symmetry and
halfband).
Handshake signals to facilitate smooth interfacing
Performance and Resource Utilization
LatticeECP3
1
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
Round
TRUN
TRUN
TRUN
SLICEs
290
512
600
LUTs
348
611
709
EBRs
-
-
-
Registers
476
877
883
Fmax
318
279
308
1. Performance and utilization data are generated targeting a LFE3-70E-7FN484CES device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeECP3 family.
LatticeECP2M/S
Channels
1
1
Taps
16
9
Interpolation
Disable
Disable
DWidth
16
8
Round
TRUN
TRUN
1
SLICEs
317
550
LUTs
378
655
EBRs
-
-
Registers
481
887
Fmax
343
310
http://www.latticesemi.com/products/intellectualproperty/ipcores/distributedarithmeticfir...
10/10/2011
Distributed Arithmetic FIR (DA-FIR)
Page 2 of 3
Channels
1
Taps
36
Interpolation
Enable
DWidth
12
Round
TRUN
SLICEs
625
LUTs
743
EBRs
-
Registers
899
Fmax
291
1. Performance and utilization data are generated targeting a LFE2M20E-6F256C device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeECP2M family.
LatticeECP2/S
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
Round
TRUN
TRUN
TRUN
1
SLICEs
317
550
625
LUTs
378
655
743
EBRs
-
-
-
Registers
481
887
899
Fmax
341
321
320
1. Performance and utilization data are generated targeting a LFE2-20E-6F256C device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeECP2 family.
LatticeECP/EC
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
Round
TRUN
TRUN
TRUN
1
SLICEs
296
521
590
LUTs
340
594
689
EBRs
-
-
-
Registers
481
887
899
Fmax
192
180
174
1. Performance and utilization data are generated targeting a LFECP15E-4F256C device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeECP family.
LatticeSC/M
1
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
Round
TRUN
TRUN
TRUN
SLICEs
278
564
568
LUTs
343
759
668
EBRs
-
-
-
Registers
481
895
934
Fmax
372
338
390
1. Performance and utilization data are generated targeting a LFSC3GA15E-6F256C device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeSC/M family.
LatticeXP2
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
Round
TRUN
TRUN
TRUN
1
SLICEs
317
550
625
LUTs
378
655
743
EBRs
-
-
-
Registers
481
887
899
Fmax
274
251
270
http://www.latticesemi.com/products/intellectualproperty/ipcores/distributedarithmeticfir...
10/10/2011
Distributed Arithmetic FIR (DA-FIR)
Page 3 of 3
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeXP2 family.
LatticeXP
Channels
1
1
1
Taps
16
9
36
Interpolation
Disable
Disable
Enable
DWidth
16
8
12
1
Round
TRUN
TRUN
TRUN
SLICEs
296
521
590
LUTs
340
594
689
EBRs
-
-
-
Registers
481
887
899
Fmax
186
178
168
1. Performance and utilization data are generated targeting a LFXP10E-4F256C device using Lattice Diamond 1.0 and Synplify Pro D-
2009.12L-1 software. Performance may vary when using a different software version or targeting a different device density or speed grade
within the LatticeXP family.
Ordering Information
Family
LatticeECP3
LatticeECP2M
LatticeECP2
LatticeECP/EC
LatticeSC
LatticeXP2
LatticeXP
Part Number
DAFIR-GEN-E3-U2
DAFIR-GEN-PM-U2
DAFIR-GEN-P2-U2
DAFIR-GEN-E2-U2
DAFIR-GEN-SC-U2
DAFIR-GEN-X2-U2
DAFIR-GEN-XM-U2
IP Version:
2.2
Evaluate:
To download a full evaluation version of this IP, go to the IPexpress tool and click the IP Server button in the
toolbar. All LatticeCORE IP cores and modules available for download will be visible. For more information on
viewing/downloading IP please read the
IP Express Quick Start Guide.
Purchase:
To find out how to purchase the IP Core, please contact your
local Lattice Sales Office.
http://www.latticesemi.com/products/intellectualproperty/ipcores/distributedarithmeticfir...
10/10/2011
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