Features
•
•
•
•
•
High-power-added Efficient Power Amplifier (P
out
Typically 29 dBm)
Controlled Output Power
Low-noise Preamplifier (NF Typically 1.5 dB)
Few External Components
PSSO20 Plastic Package with Down-set Paddle
UHF SiGe
Front-end IC
Electrostatic sensitive device.
Observe precautions for handling.
ATR0981
Preliminary
1. Description
The ATR0981 is a monolithic IC manufactured using Atmel’s advanced SiGe technol-
ogy. The IC performs a transmit and receive front-end function, dedicated for a
frequency range of 300 MHz to 500 MHz. It consists of a Low-Noise Amplifier (LNA)
and a Power Amplifier (PA) with good Power-added Efficiency (PAE).
Figure 1-1.
Block Diagram
20
19
18
17
16
15
14
13
12
11
BIAS
BIAS
1
2
3
4
5
6
7
8
9
10
Rev. 4862A–SIGE–09/05
2. Pin Configuration
Figure 2-1.
Pinning PSSO20 with Down Set Paddle
V3_PA_OUT
V3_PA_OUT
V3_PA_OUT
GND4
GND3
NC
GND2
LNA_IN
GND1
BIAS_LNA
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND5
V2_PA
GND6
POUT_CONTROL
GND3
PA_IN
GND4
LNA_OUT
GND5
VS_CTRL
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Description
Symbol
V3_PA_OUT
V3_PA_OUT
V3_PA_OUT
GND4
GND3
NC
GND2
LNA_IN
GND1
BIAS_LNA
VS_CTRL
GND5
LNA_OUT
GND4
PA_IN
GND3
POUT_CONTROL
GND6
V2_PA
GND5
Function
Matching network for power amplifier output
Inductor to power supply and matching network for power amplifier output
Inductor to power supply and matching network for power amplifier output
Ground
Ground
Not connected
Ground
Low-noise amplifier input
Ground
Resistor to V
S
sets the LNA current
Supply voltage for control of power amplifier
Ground
Low-noise amplifier output and supply voltage
Ground
Power amplifier input
Ground
Power amplifier control input
Ground
Supply voltage for power amplifier
Ground
2
ATR0981 [Preliminary]
4862A–SIGE–09/05
ATR0981 [Preliminary]
3. Absolute Maximum Ratings
All voltages are referred to GND (Pins 7, 9, 16, 18, 20, Slug)
Parameters
Supply voltage PA, TX, pins 1, 2, 3, 11, 19
Supply voltage LNA, RX, pin 13
PA control voltage, TX, pin 17
Junction temperature
Storage temperature
Electrostatic handling HMB, all RF pins
Electrostatic handling HMB, all control pins
Symbol
V
S
_PA
V
S
_LNA
V
CNTL
T
jmax
T
Stg
V
ESD
V
ESD
–55
Min.
Max.
5
2.8
5
150
+125
200
2
Unit
V
V
V
°
C
°
C
V
kV
4. Operating Range
All voltages are referred to GND (Pins 7, 9, 16, 18, 20, Slug). The following table represents the sum of all supply currents
into the mentioned pins.
Parameters
Supply voltage PA
Supply voltage LNA
Supply current PA
Supply current LNA
Ambient temperature
Test Conditions/Pins
TX, pins 1, 2, 3, 11, 19
RX, pin 13
TX, pins 1, 2, 3, 11, 19
Pins 10, 13
Symbol
V
S
_PA
V
S
_LNA
I
S
_PA
I
S
_LNA
T
amb
–30
Min.
3.0
2.4
Typ.
3.6
2.5
400
2.5
+25
+60
Max.
4.5
2.6
Unit
V
V
mA
mA
°
C
5. Thermal Resistance
Parameters
Junction ambient
Symbol
R
thJA
Value
19
Unit
K/W
3
4862A–SIGE–09/05
6. Electrical Characteristics
Test conditions (unless otherwise specified) : V
S
_PA = 3.6V, T
amb
= 25° C.
Parameters
Power Amplifier
(1)
Supply voltage
Supply current
Frequency range
Power gain
Output power control range
Control voltage
Control current
Shut down mode
Power added efficiency
Saturated output power
Harmonics
Low-noise Amplifier
Supply voltage
Supply current
Frequency range
Power gain
Noise figure
(2)
Isolation
Third-order input interception point
Notes:
RX, pins 10, 13
RX, pins 10, 13
RX
RX at R1 = 5.6 kΩ, I
S
= 2.5 mA
RX at R1 = 5.6 kΩ, I
S
= 2.5 mA
RX at R1 = 5.6 kΩ, I
S
= 2.5 mA
RX at R1 = 5.6 kΩ, I
S
= 2.5 mA
V
S
_LNA
I
S
_LNA
f
Gp
NF
ISO
IIP3
–13
300
17.5
19
1.5
20
–10
2.4
2.5
2.5
2.6
3.5
500
20.5
2.0
V
mA
MHz
dB
dB
dB
dBm
TX, pins 1, 2, 3, 11, 19
TX, pins 1, 2, 3, 11, 19
TX
TX, pin 15 to pins 1, 2, 3
TX
TX, output power (maximum), pin 17
TX, output power (minimum), pin 17
Pin 17
Control voltage
≤
0.1V,
pins 1, 2, 3, 11, 19
TX at 466 MHz
TX, input power 3 dBm
TX, input power 3 dBm
TX, input power 3 dBm
I
S
_PA
PAE
Psat
2 fo
3 fo
50
27.5
0
10
55
29
–20
–20
30.5
V
S
_PA
I
S
_PA
f
Gp
∆Pout
300
30
±1
2.0
0.7
400
20
34
±3
2.5
3.0
3.6
400
4.5
550
500
V
mA
MHz
dB
dB
V
V
µA
µA
%
dBm
dBc
dBc
Test Conditions/Pins
Symbol
Min.
Typ.
Max.
Unit
1. Power amplifier should be unconditionally stable, maximum duty cycle 100%, true cw operation, maximum load mismatch
10:1 for 5s at 3.6V
2. Ensured by design
4
ATR0981 [Preliminary]
4862A–SIGE–09/05
ATR0981 [Preliminary]
7. Typical Characteristics
Figure 7-1.
Power Sweep
70.0
60.0
PAE
50.0
40.0
30.0
20.0
10.0
0.0
-10.0
-20.0
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
PAE (%)
P
out
(dBm)
Gain (dB)
P
out
Gain
P
in
(dBm)
Figure 7-2.
Ramp Sweep
70
60
PAE
50
40
PAE (%)
P
out
(dBm)
30
P
out
20
10
0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
V
ramp
(V)
Figure 7-3.
V
CC
Sweep
70.0
60.0
PAE
50.0
40.0
30.0
PAE (%)
P
out
(dBm)
P
out
20.0
10.0
0.0
0.0
1.0
2.0
3.0
4.0
5.0
V
CC
(V)
5
4862A–SIGE–09/05
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