replace oscillators and PLL circuits in set-top box
and multimedia systems. Using our proprietary
analog Phase-Locked Loop (PLL) techniques, the
device uses an inexpensive crystal or clock input to
produce up to three output clocks. All of the audio
frequencies are synthesized exactly, with zero ppm
error, and locked to the 27 MHz clock.
MicroClock manufactures the largest variety of
Set-Top Box and multimedia clock synthesizers
for all applications. Consult MicroClock to
eliminate VCXOs, crystals and oscillators from
your board.
Features
• Packaged in 16 pin narrow SOIC
• Produces exact audio clocks from the video
• Uses a crystal or clock input
• Zero ppm synthesis error in all clocks
• All frequencies are frequency locked
• 25mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 3.3V or 5V operating voltage
Block Diagram
S2:0
3
PLL/Clock
Synthesis
Circuitry
27 MHz crystal
or clock
X1
Crystal
Oscillator
X2
Output
Buffer
Output
Buffer
CLK1
CLK2
Output
Buffer
REF
(Capacitors are required
for crystal tuning)
MDS 2731-03C D
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Revision 011101
Integrated Circuit Systems, Inc.• 525 Race Street, San Jose, CA, 95126 • (408) 295-9800 tel • www.icst.com
MK2731-03C
MPEG Audio Clock Synthesizer
Pin Assignment
MK2731-03C
X2
X1
VDD
VDD
GND
GND
S2
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
NC
CLK2
S0
NC
S1
CLK1
DC
Output Clock Select Table (MHz)
Input
27
27
27
27
27
27
27
27
S2
0
0
0
0
1
1
1
1
S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
CLK1
Off
Off
Off
Off
4.096
5.6448
6.144
12.288
CLK2
8.192
11.2896
12.288
24.576
8.192
11.2896
12.288
24.576
REF
Off
Off
Off
Off
27
27
27
27
16 pin narrow (150 mil) SOIC
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
X2
X1
VDD
VDD
GND
GND
S2
GND
DC
CLK1
S1
NC
S0
CLK2
NC
REF
Type
XO
XI
P
P
P
P
I
P
-
O
I
-
I
O
-
O
Key:
0 = connect pin directly to ground
1 = connect pin directly to VDD
Off = clock stopped low
Description
Crystal connection to a 27 MHz fundamental crystal. Leave unconnected for clock input.
Crystal connection to a 27 MHz fundamental crystal. Can also be connected to input clock.
VDD. Connect to VDD.
VDD. Connect to VDD.
Connect to ground.
Connect to ground.
Clock Select 2. Selects outputs per table above.
Connect to ground.
Do not connect anything to this pin.
Clock output 1 determined by status of S2, S1, S0. See table above.
Clock Select 1. Selects outputs per table above.
No Connect. Nothing is connected internally to this pin.
Clock Select 0. Selects outputs per table above.
Clock output 2 determined by status of S2, S1, S0. See table above.
No Connect. Nothing is connected internally to this pin.
Reference crystal output or off. See table above.
Key: I = Input, O = output, P = power supply connection
MDS 2731-03C D
2
Revision 011101
Integrated Circuit Systems, Inc.• 525 Race Street, San Jose, CA, 95126 • (408) 295-9800 tel • www.icst.com
MK2731-03C
MPEG Audio Clock Synthesizer
Electrical Specifications
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage, VDD
Input High Voltage, VIH, X1 pin only
Input Low Voltage, VIL, X1 pin only
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
Input Capacitance
Frequency synthesis error
Input Crystal or Clock Frequency
Input Crystal Accuracy
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Notes:
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
-65
3.13
(VDD/2)+1
2
0.8
IOH=-25mA
IOL=25mA
IOH=-8mA
No Load
Each output
S2, S1, S0
All clocks
2.4
0.4
VDD-0.4
25
±100
7
0
27.00
Minimum
Typical
Maximum
7
VDD+0.5
70
260
150
5.50
Units
V
V
°C
°C
°C
V
V
V
V
V
V
V
V
mA
mA
pF
ppm
MHz
ppm
ns
ns
%
ABSOLUTE MAXIMUM RATINGS (note 1)
-0.5
0
DC CHARACTERISTICS (VDD = 5.0V unless noted)
VDD/2
VDD/2
(VDD/2)-1
AC CHARACTERISTICS (VDD = 5.0V unless noted)
±30
1.5
1.5
40
60
see table on following page
0.8 to 2.0V
2.0 to 0.8V
At 1.4V
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
The MK2731-03 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1µF should be connected between VDD and GND on pins 3 and 5, as close to the
MK2731-03 as possible. A series termination resistor of 33Ω may be used for each clock output. The input
crystal must be connected as close to the chip as possible. The input crystal should be a parallel resonant,
fundamental, AT cut 27 MHz. For accurate tuning of the output when a crystal input is used, capacitors
should be connected between X1 and ground, and X2 and ground. The value of these capacitors is given by
the following equation, where C
L
is the crystal load capacitance: Crystal caps (pF) = (C
L
-10) x 2. So for a
crystal with 16 pF load capacitance, two 12 pF caps can be used.
MDS 2731-03C D
3
Revision 011101
Integrated Circuit Systems, Inc.• 525 Race Street, San Jose, CA, 95126 • (408) 295-9800 tel • www.icst.com
MK2731-03C
MPEG Audio Clock Synthesizer
Jitter Measurements
S2
0
0
0
0
Notes:
S1
0
0
1
1
S0
0
1
0
1
CLK2
(MHz)
8.192
11.2896
12.288
24.576
5V
one sigma (ps) typical max (± ps)
45
110
25
60
24
70
32
90
3.3V
one sigma (ps) typical max (± ps)
92
185
42
110
49
130
52
150
1. Jitter is about equal at 25°C and 70°C
Package Outline and Package Dimensions
16 pin SOIC narrow
Symbol
A
A1
B
C
D
E
e
H
L
Inches
Min
Max
0.0532 0.0688
0.0040 0.0098
0.0130 0.0200
0.0075 0.0098
0.3859 0.3937
0.1497 0.1574
.050 BSC
0.2284 0.2440
0.0160 0.0500
Millimeters
Min
Max
1.35
1.75
0.10
0.24
0.33
0.51
0.19
0.24
9.80
10.00
3.80
4.00
1.27 BSC
5.80
6.20
0.41
1.27
E
INDEX
AREA
H
1
2
D
A1
e
Ordering Information
Part/Order Number
MK2731-03S
MK2731-03STR
Marking
MK2731-03S
MK2731-03S
Shipping packaging
tubes
tape and reel
Package
16 pin SOIC
16 pin SOIC
Temperature
0-70 °C
0-70 °C
B
C
A
L
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated assumes no responsibility for either its use or
for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for
use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental
requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize
or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 2731-03C D
4
Revision 011101
Integrated Circuit Systems, Inc.• 525 Race Street, San Jose, CA, 95126 • (408) 295-9800 tel • www.icst.com
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