Data Sheet
FEATURES
Polyphase Multifunction Energy Metering IC
with Harmonic Monitoring
ADE7880
GENERAL DESCRIPTION
The
ADE7880
1
is a high accuracy, 3-phase electrical energy
measurement IC with serial interfaces and three flexible pulse
outputs. The
ADE7880
device incorporates second-order sigma-
delta (Σ-Δ) analog-to-digital converters (ADCs), a digital
integrator, reference circuitry, and all of the signal processing
required to perform the total (fundamental and harmonic) active,
and apparent energy measurements, rms calculations, as well as
fundamental-only active and reactive energy measurements. In
addition, the
ADE7880
computes the rms of harmonics on the
phase and neutral currents and on the phase voltages, together
with the active, reactive and apparent powers, and the power
factor and harmonic distortion on each harmonic for all phases.
Total harmonic distortion (THD) is computed for all currents
and voltages. A fixed function digital signal processor (DSP)
executes this signal processing. The DSP program is stored in
the internal ROM memory.
The
ADE7880
is suitable for measuring active, reactive, and
apparent energy in various 3-phase configurations, such as wye
or delta services with, both, three and four wires. The
ADE7880
provides system calibration features for each phase, that is, rms
offset correction, phase calibration, and gain calibration. The
CF1, CF2, and CF3 logic outputs provide a wide choice of
power information: total active powers, apparent powers, or the
sum of the current rms values, and fundamental active and
reactive powers.
The
ADE7880
contains waveform sample registers that allow
access to all ADC outputs. The devices also incorporate power
quality measurements, such as short duration low or high
voltage detections, short duration high current variations, line
voltage period measurement, and angles between phase voltages
and currents. Two serial interfaces, SPI and I
2
C, can be used to
communicate with the
ADE7880.
A dedicated high speed
interface, the high speed data capture (HSDC) port, can be used
in conjunction with I
2
C to provide access to the ADC outputs
and real-time power information. The
ADE7880
also has two
interrupt request pins, IRQ0 and IRQ1, to indicate that an enabled
interrupt event has occurred. Three specially designed low power
modes ensure the continuity of energy accumulation when the
ADE7880
is in a tampering situation. The
ADE7880
is available
in the 40-lead LFCSP, Pb-free package, pin-for-pin compatible
with
ADE7854, ADE7858, ADE7868,
and
ADE7878
devices.
Highly accurate; supports IEC 62053-21, IEC 62053-22,
IEC 62053-23, EN 50470-1, EN 50470-3, ANSI C12.20, and
IEEE1459 standards
Supports IEC 61000-4-7 Class I and Class II accuracy
specification
Compatible with 3-phase, 3-wire or 4-wire (delta or wye),
and other 3-phase services
Supplies rms, active, reactive, and apparent powers, power
factor, THD, and harmonic distortion of all harmonics
within 2.8 kHz pass band on all phases
Supplies rms and harmonic distortions of all harmonics
within 2.8 kHz pass band on neutral current
Less than 1% error in harmonic current and voltage rms,
harmonic active and reactive powers over a dynamic
range of 2000 to 1 at T
A
= 25°C
Supplies total (fundamental and harmonic) active and
apparent energy and fundamental active/reactive energy
on each phase and on the overall system
Less than 0.1% error in active and fundamental reactive
energy over a dynamic range of 1000 to 1 at T
A
= 25°C
Less than 0.2% error in active and fundamental reactive
energy over a dynamic range of 5000 to 1 at T
A
= 25°C
Less than 0.1% error in voltage and current rms over a
dynamic range of 1000 to 1 at T
A
= 25°C
Battery supply input for missing neutral operation
Wide supply voltage operation: 2.4 V to 3.7 V
Reference: 1.2 V (drift 20 ppm/°C typical) with external
overdrive capability
40-lead lead frame chip scale package (LFCSP), Pb-free, pin-
for-pin compatible with
ADE7854, ADE7858, ADE7868
and
ADE7878
APPLICATIONS
Energy metering systems
Power quality monitoring
Solar inverters
Process monitoring
Protective devices
1
Protected by U.S. Patent 8,010,304 B2. Other patents pending.
Rev. C
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ADE7880* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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REFERENCE MATERIALS
Technical Articles
•
MS-2250: Adaptive Real-Time DSP Architecture to Monitor
Harmonic Components and Various Power Quality Factors
in Electric Power Grids
EVALUATION KITS
•
ADE7880 Evaluation Board
DOCUMENTATION
Application Notes
•
AN-1127: Differences Between the ADE7880 and the
ADE7878
•
AN-1171: Calibrating a Three-Phase Energy Meter Based
on the ADE7880
•
AN-1334: Impact of Adding a Neutral Attenuation
Network in a 3P4W Wye System
•
AN-639: Frequently Asked Questions (FAQs) Analog
Devices Energy (ADE) Products
Data Sheet
•
ADE7880: Polyphase Multifunction Energy Metering IC
with Harmonic Monitoring Data Sheet
Product Highlight
• ADE7880–Polyphase Energy Metering
•
ADE78xx Polyphase Multifunction Energy Metering ICs
User Guides
•
UG-356: Evaluating the ADE7880 Energy Metering IC
DESIGN RESOURCES
•
ADE7880 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
DISCUSSIONS
View all ADE7880 EngineerZone Discussions.
SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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ADE7880
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Timing Characteristics ................................................................ 8
Absolute Maximum Ratings .......................................................... 11
Thermal Resistance .................................................................... 11
ESD Caution ................................................................................ 11
Pin Configuration and Function Descriptions ........................... 12
Typical Performance Characteristics ........................................... 14
Test Circuit ...................................................................................... 19
Terminology .................................................................................... 20
Power Management ........................................................................ 21
PSM0—Normal Power Mode (All Parts) ................................ 21
PSM1—Reduced Power Mode.................................................. 21
PSM2—Low Power Mode ......................................................... 21
PSM3—Sleep Mode (All Parts) ................................................ 22
Power-Up Procedure .................................................................. 24
Hardware Reset ........................................................................... 25
Software Reset Functionality .................................................... 25
Theory of Operation ...................................................................... 26
Analog Inputs .............................................................................. 26
Analog-to-Digital Conversion .................................................. 26
Current Channel ADC............................................................... 27
di/dt Current Sensor and Digital Integrator ............................... 29
Voltage Channel ADC ............................................................... 30
Changing Phase Voltage Data Path .......................................... 31
Data Sheet
Power Quality Measurements................................................... 32
Phase Compensation ................................................................. 37
Reference Circuit ........................................................................ 39
Digital Signal Processor............................................................. 39
Root Mean Square Measurement ............................................. 41
Active Power Calculation .......................................................... 45
Fundamental Reactive Power Calculation .............................. 51
Apparent Power Calculation ..................................................... 55
Power Factor Calculation .......................................................... 58
Harmonics Calculations ............................................................ 58
Waveform Sampling Mode ....................................................... 66
Energy-to-Frequency Conversion............................................ 66
No Load Condition .................................................................... 71
Checksum Register..................................................................... 73
Interrupts ..................................................................................... 74
Serial Interfaces .......................................................................... 75
ADE7880 Quick Setup As Energy Meter ................................ 82
Layout Guidelines....................................................................... 83
Crystal Circuit ............................................................................ 84
ADE7880 Evaluation Board ...................................................... 84
Die Version .................................................................................. 84
Silicon Anomaly ............................................................................. 85
ADE7880 Functionality Issues ................................................. 85
Functionality Issues.................................................................... 85
Section 1. ADE7880 Functionality Issues ............................... 86
Registers List ................................................................................... 87
Outline Dimensions ..................................................................... 107
Ordering Guide ........................................................................ 107
Rev. C | Page 2 of 107
Data Sheet
REVISION HISTORY
12/14—Rev. B to Rev. C
Changes to Pin EP, Table 7 .............................................................13
Changes to Configuring Harmonic Calculations Update
Rate Section ......................................................................................66
Change to Address 0x43C7, Table 30 ...........................................88
Changes to Bit 19, Table 36 ............................................................94
Changes to Bit 19, Table 38 ............................................................97
8/14—Rev. A to Rev. B
Change to Features Section .............................................................. 1
Changes to Patent Footnote ............................................................. 1
Changes to Functional Block Diagram .......................................... 4
Changes to Table 1 ............................................................................ 5
Changes to Data Hold Time Parameter, Table 2, and Figure 2 ... 8
Changes to Pin 5 and Pin 24, Table 7, and Figure 6 ...................12
Changes to Figure 16 and Figure 18 .............................................15
Changes to Figure 20 and Figure 24 Caption ..............................16
Moved Figure 29 and Figure 30 .....................................................18
Changes to Test Circuit Section and Figure 32 ...........................19
Changes to Terminology Section ..................................................20
Changes to PSM2—Low Power Mode Section ...........................21
Added Figure 34; Renumbered Sequentially ...............................22
Change to Power-Up Procedure Section and Figure 35 ............24
Changes to Figure 42 and Figure 43 .............................................28
Changes to Figure 48 and Figure 50; Added Figure 49 ..............30
Changes to Changing Phase Voltage Data Path Section and
Figure 51 ...........................................................................................31
Changes to Power Quality Measurements Section and
Figure 52 ...........................................................................................32
Changed
ADC
MAX
= 5,928,256, to
ADC
MAX
= 5,326,737,
Neutral Current Mismatch Section...............................................37
Added Figure 64 ..............................................................................38
Changes to Reference Circuit Section and Digital Signal
Processor Section ............................................................................39
Changes to Current RMS Calculation Section ............................41
Changes to Voltage RMS Offset Compensation Section,
Voltage RMS in 3-Phase, 3-Wire Delta Configurations Section,
and Active Power Calculation Section .........................................45
Changes to Figure 76 ......................................................................46
Changes to Fundamental Active Power Calculation Section ...47
Added Managing Change in Fundamental Line Frequency
Section ..............................................................................................47
Changes to Figure 78 ......................................................................49
Changes to Active Energy Accumulation Modes Section .........50
Changes to Fundamental Reactive Power Calculation Section
and Equation 35 ...............................................................................51
Changes to Fundamental Reactive Energy Accumulation
Modes Section..................................................................................54
Changes to Apparent Power Calculation Section .......................55
Changes to Apparent Energy Accumulation Modes Section
and Figure 83 ...................................................................................57
ADE7880
Changes to Power Factor Calculation Section and Harmonics
Calculations Section ....................................................................... 58
Changes to Figure 85 ...................................................................... 60
Changes to Energy-to-Frequency Conversion Section .............. 66
Changes to Checksum Register Section, Equation 54, and
Figure 100 ......................................................................................... 73
Changes to Table 24 ........................................................................ 75
Changes to I
2
C-Compatible Interface Section ............................ 76
Changes to Figure 109 .................................................................... 80
Changes to ADE7880 Quick Setup as Energy Meter Section ... 82
Added Layout Guidelines Section................................................. 83
Added Crystal Circuit Section ...................................................... 84
Changes to Silicon Anomaly Section, Table 26, and Table 27... 85
Changes to Table 30 ........................................................................ 87
Changes to Table 33 ........................................................................ 90
Changes to Bit 19, Table 36 ............................................................ 94
Changes to Bit 19, Table 38 ............................................................ 97
Changes to Table 42 ........................................................................ 99
Changes to Table 45 ......................................................................101
Changes to Table 50 ......................................................................104
Changes to Bits[4:3], Table 54 .....................................................106
3/12—Rev. 0 to Rev. A
Removed References to + N (Plus Noise) and changed VTHDN
to VTHD and ITHDN to ITHD ..................................Throughout
Changes to Reactive Energy Management Parameter in Table 14
Changes to Figure 6 ........................................................................ 11
Changes to Table 7 .......................................................................... 12
Changes to Phase Compensation Section.................................... 36
Changes to Equation 13 ................................................................. 39
Changes to Equation 33 ................................................................. 49
Changes to Fundamental Reactive Energy Calculation
Section .............................................................................................. 51
Changes to Figure 80 ...................................................................... 55
Changes to Figure 85 ...................................................................... 62
Changes to Energy Registers and CF Outputs for Various
Accumulation Modes Section ....................................................... 67
Changes to Figure 95 ...................................................................... 69
Changes to No Load Condition Section ...................................... 69
Changes to Equation 53 ................................................................. 71
Changes to Figure 100 .................................................................... 74
Changes to Figure 101 and to Figure 102 .................................... 75
Changes to SPI-Compatible Interface Section ............................ 76
Changes to HSDC Interface Section............................................. 78
Changes to Figure 109 and to Figure 110 .................................... 80
Changes to Silicon Anomaly Section ........................................... 81
Changes to Table 48 ........................................................................ 99
Changes to Table 52 ......................................................................101
10/11—Revision 0: Initial Version
Rev. C | Page 3 of 107
ADE7880
FUNCTIONAL BLOCK DIAGRAM
RESET
4
Data Sheet
REF
IN/OUT
17
VDD
26
AGND
25
AVDD
24
DVDD
5
DGND
6
AIRMSOS
POR
CLKIN
27
CLKOUT
28
1.2V
REF
HPFEN OF
CONFIG3
IAP
7
IAN
8
DIGITAL
INTEGRATOR AIGAIN
LDO
LDO
X
2
2
7
AIRMS
APGAIN
ADE7880
2
3
PM0
PM1
LPF
X
2
LPF
2
7
AVRMS
CF1DEN
AVRMSOS
DFC
APGAIN
AWATTOS
PHASE A,
PHASE B,
AND
PHASE C
DATA
PGA1
ADC
HPF
APHCAL
HPFEN OF
CONFIG3
AVGAIN
LPF
:
CF2DEN
33
CF1
VAP
23
PGA3
ADC
HPF
COMPUTATIONAL
BLOCK FOR
FUNDAMENTAL
ACTIVE AND
REACTIVE POWER
APGAIN
AFWATTOS
DFC
:
CF3DEN
34
CF2/HREADY
IBP
9
IBN
12
VBP
22
PGA1
ADC
PGA3
ADC
TOTAL/FUNDAMENTAL ACTIVE ENERGIES
FUNDAMENTAL REACTIVE ENERGY
APPARENT ENERGY
VOLTAGE CURRENT RMS
HARMONIC INFORMATION CALCULATION
FOR PHASE B
(SEE PHASE A FOR DETAILED DATA PATH)
APGAIN
AFVAROS
DFC
:
35
CF3/HSCLK
ICP
13
ICN
14
VCP
19
VN
18
PGA1
ADC
PGA3
ADC
TOTAL/FUNDAMENTAL ACTIVE ENERGIES
FUNDAMENTAL REACTIVE ENERGY
APPARENT ENERGY
VOLTAGE/CURRENT RMS
HARMONIC INFORMATION CALCULATION
FOR PHASE C
(SEE PHASE A FOR DETAILED DATA PATH)
COMPUTATIONAL
BLOCK FOR
HARMONIC
INFORMATION ON
PHASE A CURRENT
AND VOLTAGE
29
IRQ0
IRQ1
SCLK/SCL
MOSI/SDA
MISO/HSD
SS/HSA
SPI/I
2
C
32
36
38
COMPUTATIONAL BLOCK FOR HARMONIC
INFORMATION ON NEUTRAL CURRENT
I
2
C
37
39
HPFEN OF
CONFIG3
INP
15
INN
16
DIGITAL
INTEGRATOR
HSDC
NIGAIN
NIRMSOS
Figure 1.
ADE7880
Functional Block Diagram
Rev. C | Page 4 of 107
10193-001
PGA2
ADC
HPF
X
2
LPF
NIRMS
DIGITAL SIGNAL
PROCESSOR
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