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C8051F537-ITR

Description
8-bit Microcontrollers - MCU 2KB 12ADC 125C 20Pin MCU
Categorysemiconductor    The embedded processor and controller   
File Size1MB,220 Pages
ManufacturerSilicon Laboratories
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C8051F537-ITR Overview

8-bit Microcontrollers - MCU 2KB 12ADC 125C 20Pin MCU

C8051F537-ITR Parametric

Parameter NameAttribute value
Product Category8-bit Microcontrollers - MCU
ManufacturerSilicon Laboratories
RoHSDetails
Mounting StyleSMD/SMT
Package / CaseTSSOP-20
Core8051
Data Bus Width8 bit
Maximum Clock Frequency25 MHz
Program Memory Size2 kB
Data RAM Size256 B
ADC Resolution12 bit
Number of I/Os16 I/O
Operating Supply Voltage1.5 V, 2 V to 2.7 V
Maximum Operating Temperature+ 125 C
PackagingCut Tape
PackagingReel
Height1 mm
Interface TypeSPI, UART
Length6.5 mm
Minimum Operating Temperature- 40 C
Moisture SensitiveYes
Number of ADC Channels16
Number of Timers/Counters3 Timer
Processor SeriesC8051
ProductMCU
Program Memory TypeFlash
Factory Pack Quantity2500
Supply Voltage - Max2.7 V, 5.25 V
Supply Voltage - Min2 V, 2.7 V
Width4.4 mm
Unit Weight0.002483 oz
C8051F52x/F53x
8/4/2 kB ISP Flash MCU Family
Analog Peripherals
-
12-Bit ADC
Programmable throughput up to 200 ksps
Up to 6/16 external inputs
Data dependent windowed interrupt generator
Built-in temperature sensor
-
Comparator
Programmable hysteresis and response time
Configurable as wake-up or reset source
Low current
-
POR/Brownout Detector
-
Voltage Reference—1.5 and 2.2 V
(programmable)
Memory
-
8/4/2 kB Flash; In-system byte programmable in
-
Digital Peripherals
-
16/6 port I/O; push-pull or open-drain, 5 V tolerant
-
Hardware SPI™, and UART serial port
-
LIN 2.1 Controller (Master and Slave capable); no
-
-
crystal required
Three general purpose 16-bit counter/timers
Programmable 16-bit counter/timer array with three
capture/compare modules, WDT
512 byte sectors
256 bytes internal data RAM
On-Chip Debug
-
On-chip debug circuitry facilitates full-speed, non-
-
-
-
Supply Voltage 2.0 to 5.25 V
-
Built-in LDO regulator
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
instructions in 1 or 2 system clocks
Up to
25 MIPS
throughput with
25 MHz system clock
Expanded interrupt handler
intrusive in-system debug (No emulator required)
Provides breakpoints, single stepping
Inspect/modify memory and registers
Complete development kit
Clock Sources
-
Internal oscillators: 24.5 MHz
±0.5%
accuracy sup-
-
ports UART and LIN-Master operation
External oscillator: Crystal, RC, C, or Clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly
-
Packages
-
10-Pin DFN (3 x 3 mm)
-
20-pin QFN (4 x 4 mm)
-
20-pin TSSOP
Automotive Qualified
-
Temperature Range:
–40 to +125 °C
-
Compliant to AEC-Q100
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SPI
PCA
Timer 0
Timer 1
Timer 2
Port 0
CROSSBAR
12-bit
200 ksps
ADC
+
-
VOLTAGE
COMPARATOR
Port 1
LIN
TEMP
SENSOR
VREF
VREG
24.5 MHz High Precision (±0.5%) Internal Oscillator
HIGH-SPEED CONTROLLER CORE
8/4/2 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
256 B SRAM
POR
WDT
Rev. 1.4 4/12
Copyright © 2012 by Silicon Laboratories
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傻傻的熊猫 Microcontroller MCU

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