19-5585; Rev 10/10
DS1350Y/AB
4096k Nonvolatile SRAM
with Battery Monitor
www.maxim-ic.com
FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Power supply monitor resets processor when
V
CC
power loss occurs and holds processor in
reset during V
CC
ramp-up
Battery monitor checks remaining capacity
daily
Read and write access times of 70ns
Unlimited write cycle endurance
Typical standby current 50µA
Upgrade for 512k x 8 SRAM, EEPROM, or
Flash
Lithium battery is electrically disconnected to
retain freshness until power is applied for the
first time
Full
±10%
V
CC
operating range (DS1350Y)
or optional
±5%
V
CC
operating range
(DS1350AB)
Optional industrial temperature range of
-40°C to +85°C, designated IND
PowerCap Module (PCM) package
- Directly surface-mountable module
- Replaceable snap-on PowerCap provides
lithium backup battery
- Standardized pinout for all nonvolatile
(NV) SRAM products
- Detachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
BW
A15
A16
RST
V
CC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
A18
A17
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
GND V
BAT
34-Pin PowerCap Module (PCM)
(Uses DS9034PC+ or DS9034PCI+ PowerCap)
PIN DESCRIPTION
A0 – A18
DQ0 – DQ7
CE
WE
OE
RST
BW
V
CC
GND
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Reset Output
- Battery Warning
- Power (+5V)
- Ground
DESCRIPTION
The DS1350 4096k NV SRAMs are 4,194,304 bit, fully static, NV SRAMs organized as 524,288 words
by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry, which
constantly monitors V
CC
for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. Additionally, the DS1350 devices have dedicated circuitry for monitoring the status of
V
CC
and the status of the internal lithium battery. DS1350 devices in the PowerCap Module package are
directly surface mountable and are normally paired with a DS9034PC PowerCap to form a complete NV
SRAM module. The devices can be used in place of 512k x 8 SRAM, EEPROM or Flash components.
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DS1350Y/AB
READ MODE
The DS1350 devices execute a read cycle whenever
WE
(Write Enable) is inactive (high) and
CE
(Chip
Enable) and
OE
(Output Enable) are active (low). The unique address specified by the 19 address inputs
(A
0
-A
18
) defines which of the 524,288 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within t
ACC
(Access Time) after the last address input signal is stable, providing
that
CE
and
OE
(Output Enable) access times are also satisfied. If
OE
and
CE
access times are not
satisfied, then data access must be measured from the later-occurring signal (
CE
or
OE
) and the limiting
parameter is either t
CO
for
CE
or t
OE
for
OE
rather than address access.
WRITE MODE
The DS1350 devices execute a write cycle whenever the
WE
and
CE
signals are in the active (low) state
after address inputs are stable. The later-occurring falling edge of
CE
or
WE
will determine the start of
the write cycle. The write cycle is terminated by the earlier rising edge of
CE
or
WE
. All address inputs
must be kept valid throughout the write cycle.
WE
must return to the high state for a minimum recovery
time (t
WR
) before another cycle can be initiated. The
OE
control signal should be kept inactive (high)
during write cycles to avoid bus contention. However, if the output drivers are enabled (
CE
and
OE
active) then
WE
will disable the outputs in t
ODW
from its falling edge.
DATA RETENTION MODE
The DS1350AB provides full functional capability for V
CC
greater than 4.75V and write protects by 4.5V.
The DS1350Y provides full functional capability for V
CC
greater than 4.5V and write protects by 4.25V.
Data is maintained in the absence of V
CC
without any additional support circuitry. The NV SRAMs
constantly monitor V
CC
. Should the supply voltage decay, the NV SRAMs automatically write protect
themselves, all inputs become “don’t care,” and all outputs become high-impedance. As V
CC
falls below
approximately 2.7V, the power switching circuit connects the lithium energy source to RAM to retain
data. During power-up, when V
CC
rises above approximately 2.7V, the power switching circuit connects
external V
CC
to the RAM and disconnects the lithium energy source. Normal RAM operation can resume
after V
CC
exceeds 4.75V for the DS1350AB and 4.5V for the DS1350Y.
SYSTEM POWER MONITORING
DS1350 devices have the ability to monitor the external V
CC
power supply. When an out-of-tolerance
power supply condition is detected, the NV SRAMs warn a processor-based system of impending power
failure by asserting
RST
. On power-up,
RST
is held active for 200ms nominal to prevent system
operation during power-on transients and to allow t
REC
to elapse.
RST
has an open drain output driver.
BATTERY MONITORING
The DS1350 devices automatically perform periodic battery voltage monitoring on a 24-hour time
interval. Such monitoring begins within t
REC
after V
CC
rises above V
TP
and is suspended when power
failure occurs.
After each 24-hour period has elapsed, the battery is connected to an internal 1MΩ test resistor for one
second. During this one second, if battery voltage falls below the battery voltage trip point (2.6V), the
battery warning output
BW
is asserted. Once asserted,
BW
remains active until the module is replaced.
The battery is still retested after each V
CC
power-up, however, even if
BW
is active. If the battery voltage
is found to be higher than 2.6V during such testing,
BW
is de-asserted and regular 24-hour testing
resumes.
BW
has an open drain output driver.
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DS1350Y/AB
ABSOLUTE MAXIMUM RATINGS
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Commercial:
Industrial:
Storage Temperature Range
Lead Temperature (soldering, 10s)
Soldering Temperature (reflow)
-0.3V to +6.0V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
+260°C
+260°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
DS1350AB Power Supply Voltage
DS1350Y Power Supply Voltage
Logic 1
Logic 0
SYMBOL
V
CC
V
CC
V
IH
V
IL
MIN
4.75
4.5
2.2
0.0
TYP
5.0
5.0
MAX
5.25
5.5
V
CC
0.8
(T
A
: See Note 10)
UNITS
V
V
V
V
NOTES
DC E L E C T R IC A L C HA R A C T E R IS T IC S
(V
CC
= 5V
±
5% for DS1350AB)
(T
A
: See Note 10) (V
CC
= 5V
±
10% for DS1350Y)
PARAMETER
Input Leakage Current
I/O Leakage Current
CE
≥
V
IH
≤
V
CC
Output Current @ 2.4V
Output Current @ 0.4V
Standby Current
CE
=2.2V
Standby Current
CE
=V
CC
-0.5V
Operating Current
Write Protection Voltage (DS1350AB)
Write Protection Voltage (DS1350Y)
SYMBOL
I
IL
I
IO
I
OH
I
OL
I
CCS1
I
CCS2
I
CCO1
V
TP
V
TP
4.50
4.25
4.62
4.37
MIN
-1.0
-1.0
-1.0
2.0
200
50
600
150
85
4.75
4.5
TYP
MAX
+1.0
+1.0
UNITS
µA
µA
mA
mA
µA
µA
mA
V
V
14
14
NOTES
CAPACITANCE
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN
TYP
5
5
MAX
10
10
(T
A
= +25°C)
UNITS
pF
pF
NOTES
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Embedded System
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