SPMC802B
SP
32-pin General Purpose
32
Microcontroller (OTP)
AUG. 07, 2002
Version 1.0
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable.
However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
SPMC802B
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. FEATURES.................................................................................................................................................................................................. 3
3. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3.1. CPU ..................................................................................................................................................................................................... 4
3.2. M
EMORY
............................................................................................................................................................................................... 4
3.3. O
SCILLATOR
.......................................................................................................................................................................................... 4
4. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 5
4.1. PIN D
ESCRIPTIONS
(32 PIN) ................................................................................................................................................................. 5
4.2. PIN A
SSIGNMENT
.................................................................................................................................................................................. 5
5. FUNCTIONAL DESCRPITIONS.................................................................................................................................................................. 7
5.1. P
ORT
A G
ROUP
..................................................................................................................................................................................... 7
5.2. P
ORT
B G
ROUP
..................................................................................................................................................................................... 7
5.3. P
ORT
C G
ROUP
..................................................................................................................................................................................... 8
5.4. P
ORT
D G
ROUP
..................................................................................................................................................................................... 9
5.5. I
NTERRUPT
............................................................................................................................................................................................ 9
5.6. T
IMER
1 & R
EAL
T
IME
I
NTERRUPT
......................................................................................................................................................... 10
5.7. T
IMER
2 & PWM .................................................................................................................................................................................. 10
5.8. C
OMPARATOR
...................................................................................................................................................................................... 10
5.9. WAIT & STOP M
ODE
.......................................................................................................................................................................... 10
5.10. R
ESET
...............................................................................................................................................................................................11
5.11. R
ESET
M
ANAGEMENT
R
EGISTERS
......................................................................................................................................................11
6. ELECTRICAL CHARACTERISTICS......................................................................................................................................................... 12
6.1. I
TEM
D
EFINITION
.................................................................................................................................................................................. 12
6.2. A
BSOLUTE
M
AXIMUM
R
ATING
............................................................................................................................................................... 12
6.3. R
ECOMMENDED
O
PERATING
C
ONDITIONS
............................................................................................................................................. 12
6.4. PIN A
TTRIBUTE
D
ESCRIPTION
(VDD = 5.0V, T
A
= 0ºC~70ºC)............................................................................................................... 12
7. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 14
7.1. P
ACKAGE
I
NFORMATION
....................................................................................................................................................................... 14
7.2. O
RDERING
I
NFORMATION
..................................................................................................................................................................... 25
8. DISCLAIMER............................................................................................................................................................................................. 26
9. REVISION HISTORY ................................................................................................................................................................................. 27
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
2
AUG. 07, 2002
Version: 1.0
SPMC802B
32-PIN GENERAL PURPOSE
MICROCONTROLLER (OTP)
1. GENERAL DESCRIPTION
The SPMC802B is an OTP version of SPMC02A with reliability
enhancement.
It equips with an 8-bit Sunplus CPU core, 4.5K
SPMC802B also
Three groups of
bytes of program ROM, and 128 bytes of RAM.
Comparator inputs, and a Watchdog Timer.
!
Three external interrupt groups, one is come from individual I/O
Channel PB5 and group input PA3:0, one is come from
individual I/O Channel, PA7, and one is a group input, PC port.
!
External Reset input option on PB4.
!
An 8-bit Timer with Real Time Interrupt control.
!
An 8-bit Re-loadable Timer with 8 stages prescalar.
!
One 6-bit PWM waveform output.
!
Two voltage Comparator inputs with selectable internal or
external voltage reference.
compare result.
An interrupt event control for the
combines with four I/O ports, two timers with one PWM output, two
interrupt are implemented for different kinds of applications.
Major application fields are small home appliances or computer
peripheral applications.
The details are described below.
2. FEATURES
!
Built-in 8-bit Sunplus CPU core with two index registers and up
to 6MHz clock operation.
!
28 general-purpose I/O channels that are belong to four I/O
ports.
Some of them are combined with the options to select
Pull-Up/Down Resistors.
!
A watchdog timer for program control.
!
4.5K bytes of ROM with 128 bytes of RAM.
!
R-Oscillation or Crystal input options for system clock.
!
Stop or Wait Control setting for Power-Saving Mode.
!
Slow Transition Output Pins.
3. BLOCK DIAGRAM
XO/R
XI
VDD
VSS
OSC.
CKT
4.5K bytes PROM
$600~$FFF &
$1800~$1FFF
128 bytes RAM
$80 ~ $FF
8 - bit CPU
ADDRESS BUS
DATA BUS
TIMER 1
& RTI
& Watch_Dog timer
Interrupt Generator
&
RESET generator
TIMER 2 &
6 bits PWM
waveform generator
I/O PORT
&
External CLOCK Pin
I/O PORT &
PWM waveform
output
I/O PORT &
2 set Comparator
circuit
PA3-0
PA7
PC7-0
I/O PORT
&
External Interrupt
I/O PORT
&
External RESET Pin
I/O PORT
&
External IRQ Pin
/13
RESET(PB4)
PB6
/1
/1
IRQ(PB5)
PA6
PB3-1
PD3-0
PB7
PA4,PA5
PB0
/1
/1
I/O PORT
/8
/3
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
3
AUG. 07, 2002
Version: 1.0
SPMC802B
3.1. CPU
The microprocessor of SPMC802B is a SUNPLUS high
performance processor equipped with Accumulator, Program
Counter, X Register, Y Register, Stack Pointer and Processor
Status Register (The same as 6502 instruction‘s structure).
SPMC802B is a fully static CMOS design.
application needs.
The oscillation
frequency could be varied up to 6.0MHz depends on the
3.2. Memory
3.2.1. Memory map
SPMC802B Supports 4.5K bytes of EPROM with 512 bytes test
ROM.
It also has the configurable options can be programmed
The addresses for EPROM,
by writer for different applications.
$1800h ~ $1FFFh.
$00FFh.
test ROM, and options are located in $0400h ~ $0FFFh and
The RAM area is located in $0080h ~
A set of system control
The functional control registers and I/O control registers
are located in $0000h ~ $0013h.
3.1.1. Block diagram of Sunplus CPU
REGISTER SECTION
CONTROL SECTION
RESET IRQ
NMI
registers can be configured through indexed access addresses
$003Eh and $003Fh.
The buffers for stack pointer are started
This area is mirrored to
A system control register
from $01FFh with downward direction.
the RAM area $00FFh ~ $0080h.
RDY
INTERRUPT
LOGIC
A0
A1
A2
A3
A4
A5
A6
INDEX
REGISTER
X
INDEX
REGISTER
Y
STACK POINT
REGISTER
S
INSTRUCTION
DECODE
PD
named Stack Limit Register (SLR) is used to limit the Stack area to
prevent the override of the normal operating contents in the RAM.
Once the Stack is over the limiter, CPU reset will be generated.
To prevent the illegal accesses on undefined addresses, there is a
ABL
ABH
LEGEND
= 8BIT LINE
= 1 BIT LINE
A7
ALU
ADDRESS
BUS
ACCUMULATOR
A
TIMING
CONTROL
qualification block to limit the accesses.
The illegal accesses will
PCL
A8
A9
A10
A11
A12
A13
A14
A15
PCH
INPUT DATA
LATCH
IDLI
PROCESSOR
STATUS
REGISTER
P
generate the CPU reset to restart the program.
CLOCK
GENERATOR
CLK 0 IN
R/W
DATA BUS
BUFFER
INSTRUCTION
REGISTER
3.2.2. NMI, Reset, IRQ vectors
The address of NMI (not provided in this chip), RESET and IRQ
are located from $1FFA to $1FFF.
The interrupt vectors should
D0
D1
D2
D3
D4
D5
D6
D7
DATA
BUS
be specified in the program to have proper operation.
3.3. Oscillator
The SPMC802B supports AT-cut parallel resonant oscillated
Crystal /Resonator, or RC oscillator, or external clock sources by
configurable option (select one from those three types).
design
of
application
circuit
should
follow
The
the
vendors‘ specifications or recommendations.
below
represents
typical
X’TAL/ROSC
applications:
The diagram listed
circuits
for
most
SPMC802B
XI
XO/R
SPMC802B
XI
VDD
XO/R
SPMC802B
XI
XO/R
20 pf
20 pf
Rosc
(b) RC Oscillator
Connections
UNCONNECTED
External Clock
(a) Crystal or
Ceramic Resonator
Connections
(c) External
Clock Source
Connections
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
4
AUG. 07, 2002
Version: 1.0
SPMC802B
4. SIGNAL DESCRIPTIONS
4.1. PIN Descriptions (32 PIN)
Mnemonic
VDD
VSS
XO/R
PIN No.
28
27
4
System Power Supply.
System Ground.
Crystal In or Resistor In Input.
An external resistive pull-up is used to connect with internal OSC
It will
circuitry for generating the internal clock and the related time base in R-Oscillation mode.
be connected with external crystal for a crystal oscillation circuitry in crystal mode.
XI
5
Crystal Output or External Clock Input.
External clock input is used to connect with internal clock
It will
In
circuitry to generate the internal clock and the related time base in External clock mode.
be connected with external crystal for a crystal oscillation circuitry in crystal mode.
PA7:0
9, 10, 11, 12
20, 21, 22, 23
PB5
(V
pp
)
PB1
(SCK)
PB0
(SDA)
PB7:6,4:2
19, 14, 6,
3, 30
PC7:0
PD3:0
32, 1, 17, 16
31, 2, 18, 15
8, 7, 26, 25
13
29
24
GPIO Port A7:0.
Comparator.
GPIO Port B5.
General-purpose inputs/outputs.
Using the internal setting can configure it.
addition, PA7 can be used as the external interrupt input.
General-purpose input/output.
PA5:4 can be the compare inputs of
In
Functional Description
PA3:0 can be the group input of external interrupt.
Using the internal setting can configure it.
It is used as Programming Voltage
In
addition, PB5 can be used as the external Main IRQ input.
input in Programming mode.
GPIO Port B1.
GPIO Port B0.
General-purpose input/output.
Using the internal setting can configure it.
addition, it is used as Serial Clock input in Programming mode.
General-purpose input/output or the voltage reference input for the Comparator.
In addition, it is used as Serial Data input/output in
Using the internal setting can configure it.
In
Using the internal setting can configure it.
Programming mode.
GPIO Port B7:6,4:2.
for Timer 2.
GPIO Port C7:0.
GPIO Port D3:0.
General-purpose inputs/output.
addition, PB7 can be the PWM waveform output.
General-purpose inputs/outputs.
General-purpose inputs/outputs.
PB6 can be set as external event/clock input
In
PB4 can be used as the Main nRESET input.
Using the internal setting can configure it.
Using the internal setting can configure it.
addition, these pins can be used as the external interrupt inputs.
4.2. PIN Assignment
4.2.1. 32 PIN package
28 VDD
27 VSS
26 PD1
25 PD0
32 PC7
31 PC3
18 PC1
17 PC5
30 PB2
29 PB1
24 PB5
23 PA0
22 PA1
21 PA2
20 PA3
19 PB7
4.2.2. 28 PIN package
24 VDD
23 VSS
28 PC7
27 PC3
16 PC1
PC0 13
15 PC5
PC4 14
26 PB2
25 PB1
22 PB5
21 PA0
20 PA1
19 PA2
18 PA3
PB0 11
17 PB7
PB6 12
SPMC802B
SPMC802B
PA6 10
PA5 11
PA4 12
PB0 13
PB6 14
PC0 15
PC4 16
XO/R
PC6
XO/R
PB4
PC6
PC2
PB3
PD2
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
PD3
PA7
5
PC2
PB3
PA4 10
1
2
3
4
5
6
7
8
PA6
1
2
3
4
5
6
7
8
9
XI
PB4
PA7
PA5
XI
9
AUG. 07, 2002
Version: 1.0
Test/Measurement
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