U3900BM
Programmable Telephone Audio Processor
Description
The programmable telephone audio processor U3900BM
is a linear integrated circuit for use in feature phones,
answering machines, fax machines and cordless phones.
It contains the speech circuit, tone-ringer interface with
DC/DC converter, sidetone equivalent and ear-protection
rectifiers. The circuit is line-powered and contains all
components necessary for signal amplification and
adaptation to the line. The U3900BM can also be supplied
via an external power supply. An integrated voice switch
with loudspeaker amplifier enables hands-free or loud-
hearing operation. With an anti-feedback function,
acoustical feedback during loudhearing can be reduced
significantly. The generated supply voltage is suitable for
a wide range of peripheral circuits.
Features
D
D
D
D
D
D
D
D
D
D
D
Speech circuit with anti-clipping
Tone ringer interface with DC/DC converter
Speaker amplifier with anti-distortion
Power-supply management, regulated, unregulated
and a special supply for electret microphone
Voice switch
CLID + SCWID
DTMF generator
Switch matrix
Line current information
Fully programmable
Watchdog
Benefits
D
Savings of one piezoelectric transducer
D
Complete system integration of analog signal
processing on one chip
D
Very few external components
D
Highly integrated solution
D
Extremely versatile due to full programmability
Applications
Feature phone, answering machine, fax machine, speaker
phone, base station of cordless phone
Speech
circuit
Voice
switch
Audio
amplifier
Clock
Data
Reset
DTMF
Serial
bus
MCU
Tone
ringer
Class
14602
Ordering Information
Extended Type Number
U3900BM-AFN
U3900BM-AFNG3
Package
SSO44
SSO44
Remarks
Taped and reeled
Rev. A2, 25-Aug-98
1 (34)
Target Specification
U3900BM
Pin Description
SAO1
SAO2
GND
VB
ES
VMPS
SENSE
VL
IND
1
2
3
4
5
6
7
8
9
44
43
42
TSACL
MIC2
MIC1
Pin
11
12
13
14
15
16
17
18
Symbol
ADIN
CLI2
CLI1
VRING
IMPA
COSC
CLID input 2
CLID input 1
Function
Input of A/D converter
41
VMIC
40
39
38
37
36
35
34
33
32
Input for ringer supply
Input for adjusting the ringer input impedance
70-kHz oscillator for ringing power converter
MIC3
TXACL
RECO2
RECO1
TLDR
INLDR
INLDT
TLDT
HFTX
SWOUT Output for driving the external switching
transistor
VMP
Regulated output voltage for supplying the
microcontroller (typ. 3.3 V/ 6 mA in speech
mode)
Interrupt line for serial bus
Clock input for serial bus
Data line for serial bus
Input for 3.58-MHz oscillator
Reset output for the microcontroller
Input for sidetone network
Input for sidetone network
Output for connecting the sidetone network
Input for playback signal of answering
machine
RECIN
10
ADIN
11
CLI2
12
CLI1
13
VRING
14
IMPA
15
COSC
16
SWOUT
17
VMP
18
INT
19
BCL
20
BDA
21
OSCIN
22
14761
19
20
21
22
23
24
25
26
27
28
29
30
INT
BCL
BDA
OSCIN
RESET
STC
STRC
STO
AMPB
OSCOU
T Clock output for the microcontroller
31
CEAR
30
CMIC
29
AMREC
28
AMPB
27
STO
26
STRC
25
STC
24
RESET
23
OSCOUT
AMREC Output for recording signal of answering
machine
CMIC
CEAR
HFTX
TLDT
INLDT
INLDR
TLDR
RECO1
RECO2
TXACL
MIC3
VMIC
MIC1
Input for cordless telephone
Output for cordless telephone
Output for transmit-level detector in intercom
mode
Time constant of transmit-level detector
Input of transmit-level detector
Input of receive-level detector
Time constant of receive-level detector
Positive output of the receive amplifier, also
used for sidetone network
Negative output of the receive amplifier
Time-constant adjustment for transmit anti-
clipping
Input of hands-free microphone
Reference node for microphone amplifier,
supply for electret microphone
Inverting input of symmetrical microphone
amplifier with high common-mode rejection
ratio
Non-inverting input of symmetrical micro-
phone amplifier with high common-mode
rejection ratio
Time-constant for speaker amplifier anti-
clipping
31
32
33
34
35
36
37
38
39
40
41
42
Figure 1. Pinning
Pin
1
2
3
4
5
6
7
8
9
Symbol
SAO1
SAO2
GND
VB
ES
VMPS
SENSE
VL
IND
Function
Positive output of speaker amplifier
(single ended and push-pull operation)
Negative output of speaker amplifier
(push-pull only)
Ground, reference point for DC- and
AC signals
Unstabilized supply voltage
Input for external supply indication
Unregulated supply voltage for the micro-
controller (via series regulator to VMP)
Input for sensing the available line current
Positive supply-voltage input to the device in
speech mode
The internal equivalent inductance of the
circuit is proportional to the value of the
capacitor at this pin. A resistor connected to
ground may be used to adjust the DC mask.
Receive amplifier input
43
MIC2
44
TSACL
10
RECIN
2 (34)
Rev. A2, 25-Aug-98
Target Specification
U3900BM
Table of Contents
1
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Class Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1
CLID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2
Carrier Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3
Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.4
Clock Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.5
Data Recovery and Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.6
CLID: Logical Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.7
Carrier Detect, Bandpass Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.8
Special Carrier Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
SCWID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3
Guard Time, Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.4
Up Guard Time, Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5
Early Guard Time, Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.6
Down Guard Time, Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.7
Wetting Pulse Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.8
SCWID: Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.9
CAS Detect Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Line Interface and Supply-Voltage Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
Supply Structure of the Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ringing Power Converter (RPC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
Ringing Frequency Detector (RFD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Output Divider Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1
Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DTMF Dialing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1
Melody – Confidence Tone Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Acoustic Feedback Suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog-to-Digital Converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sidetone System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.2
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14.3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
5
5
5
5
5
5
6
6
6
6
6
7
7
7
7
8
8
8
9
9
10
10
12
12
12
13
13
13
13
14
14
18
18
20
21
22
24
26
26
26
26
33
3
4
5
6
7
8
9
10
11
12
13
14
15
Rev. A2, 25-Aug-98
3 (34)
Target Specification
1
U3900BM
4 (34)
V
L
39
41
6
STBAL
4
AGATX
MICRO
AGARX
TXA
25
26
10
27
8
7
9
42
TXACL
Power
supply
18
Block Diagram
43
3
11
17
Offset
canceler
MUX
ADC
AMPB
CMIC
LRX
DTMF
MIC
LIDET VMP RFDO
40
V
MIC
DTMF/
melody
Filter
30
Offset
canceler
16
32
28
Ringing
power
converter
14
15
V
RING
Switch matrix
AMREC CEAR
EPO RXLS
LTX
Figure 2. Block diagram
REG
POR
29
AGC
Filters
13
DIV.
SACL
SA
1
2
35 36
33 34
AFS
control
1/8/16/32
Target Specification
BIDIR
serial
bus
20 21 19
OSC.
3.58 MHz
31
37
CLID
TIP
RA
38
12
RING
22
23 5
24
44
Rev. A2, 25-Aug-98
RECO1
TXOUT
V
MP
m
C
14604
U3900BM
2
Class Function
a capture window (see the tables next page), and avoid a
false detection.
With the use of SCD bit the carrier detect function is
improved, because after a normal carrier detection
(NCD), a part (10 bits) of the channel seizure is taken in
count before alerting the microprocessor.
Note:
When the CPE is off hook (SCWID mode) the CO sends
FSK
data
without
channel
seizure.
The
mark signal = 80 bits
±10
at 1200 bauds (1300 Hz con-
tinuously during 67 ms).
For this case a selected bandpass 1000 Hz to 1700 Hz
could be very useful for the carrier detect ...
After the interrupt due to the carrier detect the micro-
processor can change the bandpass frequencies according
to the FSK band.
The U3900BM includes a class function
Calling Line
IDentification
(CLID) for on-hook and
Spontaneous Call
Waiting IDentifier
(SCWID) for off-hook status.
2.1
CLID
CLID is designed to demodulate CCITT V23 and BELL
202 (1200 bauds FSK asynchronous data) and is
compatible with both formats without external
intervention. It fulfils the CS B14-10W requirements.
The main feature of this part is to provide, for the user,
information about the caller before answering the call.
The information is a DATA message sent from the
Central
Office
(CO) to the CPE during the silent interval, and
after the first ringing burst.
2.1.1
Description
On the receive side, the received signal coming from
CLI1 and CLI2 first goes to an antialiasing filter after the
differential op-amp.
The next section is a bandpass filter composed of an FSK
filter composed of a fifth order high-pass followed by a
third order low-pass filter. The low-pass and high-pass
cut-off frequencies are about 300 Hz and 3400 Hz
respectively.
D
The normal carrier detect guard time is 26.4 ms.
D
The improved carrier detect guard time is 34.7 ms.
D
The carrier lost guard time is 8.8 ms, in all the cases.
2.1.3
Demodulator
This part is enabled with the carrier detect signal.
The reference signal is at 1700 Hz, (the same frequency
for BELL 202 and V23). All the incoming signals are
compared to this value to make a digital square wave
frequency varying in frequency and in phase as a function
of the input frequencies.
2.1.2
Carrier Detect
The carrier detect provides an indication (to the micro-
processor with an interrupt request) of the presence of a
signal in the FSK band. It detects a sufficient amplitude
signal at the output of the FSK bandpass filter.
Note that signals such as speech or DTMF tones also lie
in the FSK frequency band and the carrier detect may be
activated by these signals. The signals will be
demodulated and presented as DATA. To avoid false
DATA detection, a command bit is used to disable the
demodulator when no FSK signal is expected.
Four bits are provided to improve carrier detection
[CD_CD
<3..0
>]. With these bits it is possible to select
2.1.4
Clock Recovery
The process starts at the first low-level bit received from
the demodulator. After that the CLOCK is generated for
the 10 serial bits (1 bit start, 8 bits data, 1 bit stop).When
all the data are received DATA READY is generated. This
signal loads the serial data in a parallel buffer.
DATA READY provides an indication (to the micro-
processor with an interrupt request) of the presence data
byte available.
Rev. A2, 25-Aug-98
5 (34)
Target Specification
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