EEWORLDEEWORLDEEWORLD

Part Number

Search

570ABC000121DG

Description
Programmable Oscillators PRGRMMBL XO 8 PIN 7mm x 5 mm (NCNR)
CategoryPassive components   
File Size550KB,37 Pages
ManufacturerSilicon Laboratories
Download Datasheet Parametric View All

570ABC000121DG Online Shopping

Suppliers Part Number Price MOQ In stock  
570ABC000121DG - - View Buy Now

570ABC000121DG Overview

Programmable Oscillators PRGRMMBL XO 8 PIN 7mm x 5 mm (NCNR)

570ABC000121DG Parametric

Parameter NameAttribute value
Product CategoryProgrammable Oscillators
ManufacturerSilicon Laboratories
RoHSDetails
Frequency10 MHz to 1417.5 MHz
Frequency Stability20 PPM
Load Capacitance15 pF
Operating Supply Voltage3.3 V
Supply Voltage - Min2.97 V
Supply Voltage - Max3.63 V
Output FormatLVPECL
ProductXO
Termination StyleSMD/SMT
Package / Case5 mm x 7 mm
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length7 mm
Width5 mm
Height1.65 mm
PackagingBulk
Current Rating120 mA
Duty Cycle - Max55 %
Mounting StyleSMD/SMT
Factory Pack Quantity1
TypeI2C Programmable
Unit Weight0.006562 oz
Si 5 7 0 / S i 5 7 1
10 MH
Z
Features
TO
1.4 G H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Any programmable output
frequencies from 10 to 945 MHz and
select frequencies to 1.4 GHz
I
2
C serial interface
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available LVPECL, CMOS,
LVDS, and CML outputs
Industry-standard 5x7 mm
package
Pb-free/RoHS-compliant
1.8, 2.5, or 3.3 V supply
Si5602
Applications
Ordering Information:
SONET/SDH
xDSL
10 GbE LAN/WAN
ATE
High performance
instrumentation
Low-jitter clock generation
Optical modules
Clock and data recovery
See page 32.
Pin Assignments:
See page 31.
(Top View)
SDA
7
NC
1
6
V
DD
Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-
programmable to any output frequency from 10 to 945 MHz and select frequencies
to 1400 MHz with <1 ppb resolution. The device is programmed via an I
2
C serial
interface. Unlike traditional XO/VCXOs where a different crystal is required for
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL
clock synthesis IC to provide any-frequency operation. This IC-based approach
allows the crystal resonator to provide exceptional frequency stability and
reliability. In addition, DSPLL clock synthesis provides superior supply noise
rejection, simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems.
OE
2
5
CLK–
GND
3
8
SCL
4
CLK+
Functional Block Diagram
V
DD
CLK-
CLK+
Si570
SDA
7
OE
Fixed
Frequency
XO
10-1400 MHz
DSPLL Clock
Synthesis
V
C
1
6
V
DD
SDA
SCL
OE
2
5
CLK–
Si571 only
ADC
GND
3
8
SCL
4
CLK+
GND
V
C
Si571
Si570/Si571
Rev. 1.5 4/14
Copyright © 2014 by Silicon Laboratories
A remote medical monitoring system based on wireless sensor networks
Introduction: Medical monitoring instruments can be divided into two categories. One category refers to specialized instruments used by professional doctors or professional technicians in hospitals to...
dtcxn Medical Electronics
Has anyone worked on the internal ADC of lm3s811?
As the title says, since I am a novice and don’t know anything, I hope everyone can know,I don't know how to connect a normal sliding rheostat test circuit. I connected it myself and it didn't work as...
wc47716114 Microcontroller MCU
Microsoft's new patent seems to suggest that it is developing Kinect smart glasses device
[align=center][color=rgb(51, 51, 51)][size=16px][/size][/color][/align][align=left][color=#333333][size=16px]A new Microsoft patent titled "head-mounted display" has just been made public, seemingly f...
wstt Creative Market
I just learned VHDL. Could you please tell me how to write this program in VHDL?
There are four variables that are all integers, and the numbers are between 0 and 99. Please use VHDL to design a circuit that can determine the largest and smallest numbers from the four numbers. For...
龙困浅滩 FPGA/CPLD
About the Minimum System
My personal understanding of the minimum system: power, clock, reset, IO; is this right?...
MarkHu GD32 MCU
Selected TI Industrial and Medical Reference Design blog posts
[align=left][b]Design Introduction[/b][/align][align=left]This TI Design is a complete 8-channel digital input module front-end reference design for programmable logic controllers (PLCs). This design ...
EEWORLD社区 TI Technology Forum

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2651  897  1192  175  188  54  19  24  4  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号