VDE = Differential Error Voltage = Common-Mode Error Voltage. See Theory of Operation section.
VFS = 2 × (VREFHI – VREFLO).
3
Maximum input transition time (10% to 90%) = 0.8/(2f) where f is the operating CLK rate.
4
Measured from 50% of falling CLK edge to 50% of output change. Measurement is made for both states of INV.
TE
20
–0.2
125
0
10
100
0
1
1
3
3
3
3
2.5
3
0.05
0.6
1.2
2
1.5
1.1
12.0
12.4
100
22
10.0
10.4
VREFHI ≥ VREFLO
VREFHI ≥ VREFLO
To VREFLO
VREFLO
V1 – 0.5
AVCC
AVCC – 1.3
5.5
0.8
1.3
14.0
14.4
AD8383
SPECIFICATIONS
(continued)
Parameter
VIDEO OUTPUT DYNAMIC PERFORMANCE
Data Switching Slew Rate
Invert Switching Slew Rate
Data Switching Settling Time to 1%
Data Switching Settling Time to 0.25%
Invert Switching Settling Time to 1%
Invert Switching Settling Time to 0.25%
Invert Switching Overshoot
CLK and Data Feedthrough
5
All-Hostile Crosstalk
6
Amplitude
Duration
DAC Transition Glitch Energy
POWER SUPPLY
DVCC, Operating Range
DVCC, Quiescent Current
AVCC, Operating Range
Total AVCC Quiescent Current
STBY AVCC Current STBY = H
STBY DVCC Current STBY = H
OPERATING TEMPERATURE RANGE, T
A
AMBIENT TEMPERATURE RANGE
7
OPERATING TEMPERATURE RANGE, T
J
Conditions
T
C, MIN
to T
C, MAX
, V
O
= 5 V Step, C
L
= 150 pF
20% to 80%
20% to 80%
Min
Typ
460
560
19
30
75
250
100
10
40
20
0.3
Max
Unit
V/µs
V/µs
ns
ns
ns
ns
mV
mV p-p
mV p-p
ns
nV-s
V
mA
V
mA
mA
mA
°C
°C
°C
V
O
= 10 V Step
V
O
= 10 V Step
V
O
= 10 V Step
24
50
120
500
200
Code 511 to Code 512
LE
0
0
25
Rev. 0 | Page 4 of 16
Ambient Temperature
100% tested
5
6
Measured on two outputs differentially as CLK and DB(0:9) are driven and STSQ and XFR are held low.
Measured on two outputs differentially as the other four outputs make a full-scale transition for both states of INV.
7
Operation at 85°C ambient temperature requires a thermally optimized PCB layout (see Application Notes), minimum airflow of 200 lfm, input clock rate not
exceeding 100 MHz, black-to-white transition ≤4 V, C
L
≤150 pF.
O
B
SO
TE
3
3.3
20
9
40
0.15
3.5
3.6
28
18
48
0.45
5
75
85
125
AD8383
ABSOLUTE MAXIMUM RATINGS
Table 2. AD8383 Stress Ratings
Parameter
Supply Voltages
AVCCx – AGNDx
DVCC – DGND
Input Voltages
Maximum Digital Input Voltages
Minimum Digital Input Voltages
Maximum Analog Input Voltages
Minimum Analog Input Voltages
Internal Power Dissipation
8
LFCSP Package @ 25°C Ambient
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering 10 sec)
Rating
18 V
4.5 V
DVCC + 0.5 V
DGND – 0.5 V
AVCC + 0.5 V
AGND – 0.5 V
3.8 W
0°C to 85°C
–65°C to +125°C
300°C
MAXIMUM POWER DISSIPATION
Junction Temperature
The maximum power that can be safely dissipated by the
AD8383 is limited by its junction temperature. The maximum
safe junction temperature for plastic encapsulated devices as
determined by the glass transition temperature of the plastic is
approximately 150°C. Exceeding this limit temporarily may
cause a shift in the parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding a
junction temperature of 175°C for an extended period can
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Industrial Control Electronics
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