MOSFET
MetalOxideSemiconductorFieldEffectTransistor
OptiMOS
TM
OptiMOS
ª
5Power-Transistor,80V
BSZ084N08NS5
DataSheet
Rev.2.0
Final
PowerManagement&Multimarket
OptiMOS
ª
5Power-Transistor,80V
BSZ084N08NS5
1Description
Features
•Idealforhighfrequencyswitchingandsync.rec.
•OptimizedtechnologyforDC/DCconverters
•ExcellentgatechargexR
DS(on)
product(FOM)
•Verylowon-resistanceR
DS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC
1)
fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21
•Highersolderjointreliabilitywithenlargedsourceinterconnection
S1
8D
7D
6D
5D
(enlarged source interconnection)
TSDSON-8FL
Table1KeyPerformanceParameters
Parameter
V
DS
R
DS(on),max
I
D
Q
oss
Q
G
(0V..10V)
Value
80
8.4
40
25
20
Unit
V
mΩ
A
nC
nC
S2
S3
G4
Type/OrderingCode
BSZ084N08NS5
Package
PG-TSDSON-8 FL
Marking
084N08N
RelatedLinks
-
1)
J-STD20 and JESD22
Final Data Sheet
2
Rev.2.0,2014-12-17
OptiMOS
ª
5Power-Transistor,80V
BSZ084N08NS5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
3
Rev.2.0,2014-12-17
OptiMOS
ª
5Power-Transistor,80V
BSZ084N08NS5
2Maximumratings
atT
j
=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Continuous drain current
Pulsed drain current
1)
Avalanche energy, single pulse
2)
Gate source voltage
Power dissipation
Operating and storage temperature
Symbol
I
D
I
D,pulse
E
AS
V
GS
P
tot
T
j
,T
stg
Values
Min.
-
-
-
-
-20
-
-55
Typ.
-
-
-
-
-
-
-
Max.
40
40
160
76
20
63
150
Unit
A
A
mJ
V
W
°C
Note/TestCondition
T
C
=25°C
T
C
=100°C
T
C
=25°C
I
D
=20A,R
GS
=25Ω
-
T
C
=25°C
IEC climatic category;
DIN IEC 68-1: 55/150/56
3Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Thermal resistance, junction - case
Device on PCB,
6 cm
2
cooling area
3)
Symbol
R
thJC
R
thJA
Values
Min.
-
-
Typ.
1.2
-
Max.
2
60
Unit
K/W
K/W
Note/TestCondition
-
-
1)
2)
See figure 3 for more detailed information
See figure 13 for more detailed information
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
Final Data Sheet
4
Rev.2.0,2014-12-17
OptiMOS
ª
5Power-Transistor,80V
BSZ084N08NS5
4Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
Transconductance
Symbol
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
R
DS(on)
R
G
g
fs
Values
Min.
80
2.2
-
-
-
-
-
-
20
Typ.
-
3.0
0.1
10
1
7.1
9.9
1.2
39
Max.
-
3.8
1
100
100
8.4
11.9
2
-
Unit
V
V
µA
nA
mΩ
Ω
S
Note/TestCondition
V
GS
=0V,I
D
=1mA
V
DS
=V
GS
,I
D
=31µA
V
DS
=80V,V
GS
=0V,T
j
=25°C
V
DS
=80V,V
GS
=0V,T
j
=125°C
V
GS
=20V,V
DS
=0V
V
GS
=10V,I
D
=20A
V
GS
=6V,I
D
=5A
-
|V
DS
|>2|I
D
|R
DS(on)max
,I
D
=20A
Table5Dynamiccharacteristics
Parameter
Input capacitance
Output capacitance
1)
Reverse transfer capacitance
1)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Symbol
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Values
Min.
-
-
-
-
-
-
-
Typ.
1400
240
13
13
5
25
5
Max.
1820
312
22.8
-
-
-
-
Unit
pF
pF
pF
ns
ns
ns
ns
Note/TestCondition
V
GS
=0V,V
DS
=40V,f=1MHz
V
GS
=0V,V
DS
=40V,f=1MHz
V
GS
=0V,V
DS
=40V,f=1MHz
V
DD
=40V,V
GS
=10V,I
D
=20A,
R
G,ext
=1.6Ω
V
DD
=40V,V
GS
=10V,I
D
=20A,
R
G,ext
=1.6Ω
V
DD
=40V,V
GS
=10V,I
D
=20A,
R
G,ext
=1.6Ω
V
DD
=40V,V
GS
=10V,I
D
=20A,
R
G,ext
=1.6Ω
Table6Gatechargecharacteristics
2)
Parameter
Gate to source charge
Gate to drain charge
1)
Switching charge
Gate charge total
1)
Gate plateau voltage
Gate charge total, sync. FET
Output charge
1)
Symbol
Q
gs
Q
gd
Q
sw
Q
g
V
plateau
Q
g(sync)
Q
oss
Values
Min.
-
-
-
-
-
-
-
Typ.
6.5
4.4
7.1
20
4.7
17
25
Max.
-
7
-
25
-
-
33
Unit
nC
nC
nC
nC
V
nC
nC
Note/TestCondition
V
DD
=40V,I
D
=20A,V
GS
=0to10V
V
DD
=40V,I
D
=20A,V
GS
=0to10V
V
DD
=40V,I
D
=20A,V
GS
=0to10V
V
DD
=40V,I
D
=20A,V
GS
=0to10V
V
DD
=40V,I
D
=20A,V
GS
=0to10V
V
DS
=0.1V,V
GS
=0to10V
V
DD
=40V,V
GS
=0V
1)
2)
Defined by design. Not subject to production test.
See
″Gate
charge waveforms″ for parameter definition.
Final Data Sheet
5
Rev.2.0,2014-12-17
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