LPC11E6x
32-bit ARM Cortex-M0+ microcontroller; up to 256 kB flash
and 36 kB SRAM; 4 kB EEPROM; 12-bit ADC
Rev. 1.3 — 8 September 2016
Product data sheet
1. General description
The LPC11E6x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at
CPU frequencies of up to 50 MHz. The LPC11E6x support up to 256 KB of flash memory,
a 4 KB EEPROM, and 36 KB of SRAM.
The ARM Cortex-M0+ is an easy-to-use, energy-efficient core using a two-stage pipeline
and fast single-cycle I/O access.
The peripheral complement of the LPC11E6x includes a DMA controller, a CRC engine,
two I
2
C-bus interfaces, up to five USARTs, two SSP interfaces, PWM/timer subsystem
with six configurable multi-purpose timers, a Real-Time Clock, one 12-bit ADC,
temperature sensor, function-configurable I/O ports, and up to 80 general-purpose I/O
pins.
For additional documentation related to the LPC11E6x parts, see
Section 18
“References”.
2. Features and benefits
System:
ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz
with single-cycle multiplier and fast single-cycle I/O port.
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
AHB Multilayer matrix.
System tick timer.
Serial Wire Debug (SWD) and JTAG boundary scan modes supported.
Micro Trace Buffer (MTB) supported.
Memory:
Up to 256 KB on-chip flash programming memory with page erase.
Up to 32 KB main SRAM.
Up to two additional SRAM blocks of 2 KB each.
Up to 4 KB EEPROM.
ROM API support:
Boot loader.
USART drivers.
I2C drivers.
DMA drivers.
Power profiles.
Flash In-Application Programming (IAP) and In-System Programming (ISP).
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
32-bit integer division routines.
Digital peripherals:
Simple DMA engine with 16 channels and programmable input triggers.
High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 80
General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,
programmable open-drain mode, input inverter, and programmable glitch filter and
digital filter.
Pin interrupt and pattern match engine using eight selectable GPIO pins.
Two GPIO group interrupt generators.
CRC engine.
Configurable PWM/timer subsystem (two 16-bit and two 32-bit standard
counter/timers, two State-Configurable Timers (SCTimer/PWM)) that provides:
Up to four 32-bit and two 16-bit counter/timers or two 32-bit and six 16-bit
counter/timers.
Up to 21 match outputs and 16 capture inputs.
Up to 19 PWM outputs with 6 independent time bases.
Windowed WatchDog timer (WWDT).
Real-time Clock (RTC) in the always-on power domain with separate battery supply
pin and 32 kHz oscillator.
Analog peripherals:
One 12-bit ADC with up to 12 input channels with multiple internal and external
trigger inputs and with sample rates of up to 2 Msamples/s. The ADC supports two
independent conversion sequences.
Temperature sensor.
Serial interfaces:
Up to five USART interfaces, all with DMA, synchronous mode, and RS-485 mode
support. Four USARTs use a shared fractional baud generator.
Two SSP controllers with DMA support.
Two I
2
C-bus interfaces. One I
2
C-bus interface with specialized open-drain pins
supports I2C Fast-mode Plus.
Clock generation:
12 MHz internal RC oscillator trimmed to 1 % accuracy for
25 C
T
amb
+85
C
that can optionally be used as a system clock.
On-chip 32 kHz oscillator for RTC.
Crystal oscillator with an operating range of 1 MHz to 25 MHz. Oscillator pins are
shared with the GPIO pins.
Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal.
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
Power control:
Integrated PMU (Power Management Unit) to minimize power consumption.
Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and
Deep power-down mode.
Wake-up from Deep-sleep and Power-down modes on external pin inputs and
USART activity.
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
LPC11E6X
Product data sheet
Rev. 1.3 — 8 September 2016
2 of 90
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
Power-On Reset (POR).
Brownout detect.
Unique device serial number for identification.
Single power supply (2.4 V to 3.6 V).
Separate VBAT supply for RTC.
Operating temperature range -40 °C to 105 °C.
Available as LQFP48, LQFP64, and LQFP100 packages.
3. Applications
Three-phase e-meter
GPS tracker
Gaming accessories
Car radio
Medical monitor
PC peripherals
4. Ordering information
Table 1.
Ordering information
Package
Name
LPC11E66JBD48
LPC11E67JBD48
LPC11E67JBD64
LPC11E67JBD100
LPC11E68JBD48
LPC11E68JBD64
LPC11E68JBD100
LQFP48
LQFP48
LQFP64
LQFP100
LQFP48
LQFP64
LQFP100
Description
plastic low profile quad flat package; 48 leads; body 7
7
1.4 mm
plastic low profile quad flat package; 48 leads; body 7
7
1.4 mm
plastic low profile quad flat package; 64 leads; body 10
10
1.4 mm
plastic low profile quad flat package; 100 leads; body 14
14
1.4 mm
plastic low profile quad flat package; 48 leads; body 7
7
1.4 mm
plastic low profile quad flat package; 64 leads; body 10
10
1.4 mm
plastic low profile quad flat package; 100 leads; body 14
14
1.4 mm
Version
SOT313-2
SOT313-2
SOT314-2
SOT407-1
SOT313-2
SOT314-2
SOT407-1
Type number
4.1 Ordering options
Table 2.
Ordering options
USART0
USART1
USART2
USART3
USART4
Flash/ EEPROM/
KB
KB
SRAM/
KB
I
2
C
SSP
PWM/
timers
12-bit ADC GPIO
channels
Type number
LPC11E66JBD48
LPC11E67JBD48
LPC11E67JBD64
LPC11E67JBD100
LPC11E68JBD48
LPC11E68JBD64
LPC11E68JBD100
64
128
128
128
256
256
256
4
4
4
4
4
4
4
12
20
20
20
36
36
36
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
N
Y
N
N
Y
2
2
2
2
2
2
2
2
2
2
2
2
2
2
6
6
6
6
6
6
6
8
8
10
12
8
10
12
36
36
50
80
36
50
80
LPC11E6X
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1.3 — 8 September 2016
3 of 90
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
5. Marking
n
Terminal 1 index area
1
aaa-011231
n
Terminal 1 index area
1
aaa-011232
Fig 1.
LQFP64/100 package marking
Fig 2.
LQFP48 package marking
5.1 Product identification
The LPC11E6x devices typically have the following top-side marking for LQFP100
packages:
LPC11E6xJBD100
xxxxxx xx
xxxyywwxR[x]
The LPC11E6x devices typically have the following top-side marking for LQFP64
packages:
LPC11E6xJ
xxxxxx xx
xxxyywwxR[x]
The LPC11E6x devices typically have the following top-side marking for LQFP48
packages:
LPC11E6xJ
xx xx
xxxyy
wwxR[x]
Field ‘yy’ states the year the device was manufactured. Field ‘ww’ states the week the
device was manufactured during that year.
Field ‘R’ identifies the device revision.
LPC11E6X
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1.3 — 8 September 2016
4 of 90
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