EEWORLDEEWORLDEEWORLD

Part Number

Search

MI-P7ZX-IXA

Description
Military Chassis Mount DC-DC Converters 10 to 300W Single, Dual, Triple Outputs
File Size129KB,4 Pages
ManufacturerVICOR
Websitehttp://www.vicorpower.com/
Download Datasheet View All

MI-P7ZX-IXA Overview

Military Chassis Mount DC-DC Converters 10 to 300W Single, Dual, Triple Outputs

MI - MegaMod
TM
Family
Military Chassis Mount DC-DC Converters 10 to 300W
Single, Dual, Triple Outputs
Features
Inputs:
28, 155, 165 and 270Vdc
Any output: 2 to 48Vdc
Up to 13.5W/in
3
High efficiency
Size — 1- up half-size: 2.58" x 2.5" x 0.62"
(65,5 x 63,5 x 15,7mm)
Size — 1- up full-size: 4.9" x 2.5" x 0.62"
(124,5 x 63,5 x 15,7mm)
Size — 2- up half-size: 2.58" x 4.9" x 0.62"
(65,5 x 124,5 x 15,7mm)
Size — 2- up full-size: 4.9" x 4.9" x 0.62"
(124,5 x 124,5 x 15,7mm)
Size — 3- up half-size: 2.58" x 7.3" x 0.62"
(65,5 x 185,4 x 15,7mm)
Size — 3- up full-size: 4.9" x 7.3" x 0.62"
(124,5 x 185,4 x 15,7mm)
Product Highlights
Vicor’s MI-MegaMod family
of single, dual, and triple output
DC-DC converters provide power
system designers with cost-
effective, high-performance, off-
the-shelf solutions to applications
that might otherwise require a
custom supply.
Incorporating standard MI-200
or MI-J00 family converters in
rugged, chassis mount packages,
MegaMods can be ordered with
single, dual, or triple outputs,
having a combined output power
of up to 300W. Totally isolated
outputs eliminate efficiency
penalties and output interaction
problems.
Remote sense
ZVS/ZCS power architecture
Low noise FM control
Configuration Chart
Full-Size MegaMods
Single Output
MI-L
MI-M
MI-N
Dual Output
MI-P
MI-Q
Triple Output
MI-R
Number of
Modules
1
2
3
2
3
3
50 – 100W
150 – 200W
300W
100 – 200W
200 – 300W
150 – 300W
4.9" x 2.5" x 0.62"
4.9" x 4.9" x 0.62"
4.9" x 7.3" x 0.62"
4.9" x 4.9" x 0.62"
4.9" x 7.3" x 0.62"
4.9" x 7.3" x 0.62"
Half-Size MegaMods
Single Output
MI-LJ
Dual Output
MI-PJ
Triple Output
MI-RJ
10 – 50W
20 – 100W
30 – 150W
2.58" x 2.5" x 0.62"
2.58" x 4.9" x 0.62"
2.58" x 7.3" x 0.62"
1
2
3
Input Voltage
Nominal Range Transient
2 =28Vdc
5 =155Vdc
6 =270Vdc
7 =165Vdc
18 –
60V
100 – 210V 230V
125 – 400V
(2)
475V
100 – 310V
(3)
50V
(1)
Output Voltage
Z = 2V
Y = 3.3V
0 = 5V
X = 5.2V
W= 5.5V
V = 5.8V
T = 6.5V
R = 7.5V
M = 10V
1 = 12V
P = 13.8V
2 = 15V
N = 18.5V
3 = 24V
L = 28V
J = 36V
K = 40V
4 = 48V
Product Grade
Full-Size
I = –40°C to +85°C
M = –55°C to +85°C
Half-Size
I = –40°C to +100°C
M = –55°C to +100°C
Output Power/Current
Full-Size
Half-Size
≥5V
<5V
≥5V
<5V
Y
X
W
V
= 50W 10A A = 10W —
= 75W 15A Z = 25W 5A
= 100W 20A Y = 50W 10A
= — 30A
Output Power/Current
≥5V
<5V
V
U
S
=
=
=
150W
200W
30A
60A
Output Power/Current
≥5V
<5V
S
P
=
=
300W
90A
(1)
(2)
(3)
16V operation at 75% load.
These units rated at 75% load from 125 – 150Vin: Full-size – 5Vout @ 100W; 2Vout and 3.3Vout @ 30A
Half-Size – 5Vout @ 50W; 2V and 3.3V @ 10A.
For use with Vicor’s MI-AIM
MI-MegaMod 10/02
1 of 4
DSP Design Scheme for Power Electronics Control System
[align=left]Author: Wang Qi and Chen Baichao from Wuhan University Source: Single Chip Microcomputer and Embedded System Application [/align] [align=left][b]Abstract [/b] Taking the motor control chip...
hellodsp DSP and ARM Processors
If the divisor is not a power of 2, it will take up a lot of resources.
As the title says, I want to divide 833333. Direct division will take up about 1000 logic units. If I divide 1048576 (2 to the 20th power), very few resources will be used, but the precision is not en...
小an FPGA/CPLD
A ZedBoad development board is basically new and is packaged in
[color=#444444][font=Tahoma,]A zedboad development board is basically new. The packaging and CD are also here. It is basically new. If you need it, please contact my QQ 2638823746[/font][/color] [colo...
2638823746 Buy&Sell
MCU Application Programming Skills (FAQ) 8
40. What is the concept of Delta-Sigma software measurement? Answer: The Delta-Sigma principle is generally used in ADC applications. Specifically, the working principle of Delta-Sigma ADC is that a m...
songbo MCU
Problems with generating LINUX device tree DTS files
Some files are needed when generating the device tree, but there are no hps_clock_info.xml and hps_common_board_info.xml files in my new project. I would like to ask if there are any friends who have ...
chunlei9924 FPGA/CPLD
430 I/O interruption question
#includeint main(void) {WDTCTL = WDTPW | WDTHOLD;// Stop watchdog timerP1DIR |= BIT0;// Set P1.0 to output directionP1OUT = ~BIT0;P1REN |= BIT4;// Enable P1.4 internal resistanceP1OUT |= BIT4;// Set P...
zhanghuaihe01 Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1138  1107  1540  7  1532  23  31  1  40  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号