GS3490
Configurable Adaptive Cable
Equalizer/Cable Driver
Gennum Products
Key Features
•
•
Connection to a single BNC connector as an adaptive
cable equalizer or cable driver
Performance and cable reach optimized for
SMPTE ST 424, SMPTE ST 292, and SMPTE ST 259 data
rates
Multi-rate operation from 125Mb/s to 2.97Gb/s in
Equalizer Mode and 270Mb/s to 2.97Gb/s in
Cable Driver Mode
Supports DVB-ASI at 270Mb/s
Integrated 100Ω, differential digital data input/output
termination
Low power operation from a single 3.3V supply:
206mW typical power consumption in EQ mode
190mW typical power consumption in CD mode
•
•
Temperature range: -40°C to +85°C
32-pin 5mm x 5mm QFN package
CD_ENABLE
CD_SD_EN
RSET
Description
The GS3490 features integrated adaptive cable equalizer
and cable driver functionality. The GS3490 can be
field-configured as a SMPTE compliant cable equalizer or a
SMPTE compliant cable driver.
The GS3490 is optimized for applications with limited I/O
space. With its configurable EQ and cable driver
functionality, the GS3490 can be utilized as a single-device
solution in applications where the interface connector can
be configured as either an input or output.
The GS3490's cable equalizer is optimized for operation at
2.97Gb/s, 1.485Gb/s and 270Mb/s while providing typical
cable reach of 140m at 2.97Gb/s, 260m at 1.485Gb/s and
500m at 270Mb/s.
In cable driver mode, the dual slew rate capability provides
compatibility to SMPTE ST 424, SMPTE ST 292 and
SMPTE ST 259 interfaces.
•
•
•
•
Cable Equalizer Features
•
Integrated cable equalizer:
140m - 3G
260m - HD
SDI/SDO
CD
DDI
DDI
500m - SD
•
•
Carrier detect with adjustable squelch threshold
Optional automatic power-down on loss of input
signal
EQ
DDO
DDO
CD
Cable Driver Features
EQ_DISABLE
•
Selectable output slew rate cable driver for compliance
with SMPTE ST 424, SMPTE ST 292, and SMPTE ST 259
standards
Applications
•
SMPTE ST 424, SMPTE ST 292 and SMPTE ST 259
interfaces requiring switching between cable
equalizing or cable driving functionality
GS3490 Block Diagram
GS3490
Final Data Sheet
GENDOC-058568
www.semtech.com
Rev. 1
April 2014
EQ_GAIN_SEL
EQ_BYPASS
EQ_OP_CTRL
EQ_SQ_ADJ
1 of 22
Proprietary & Confidential
Revision History
Version
1
0
B
A
ECO
019093
015642
011682
158716
PCN
—
—
—
—
Date
April 2014
September 2013
March 2013
October 2012
Changes and/or Modifications
Converted to Final Data Sheet. Updated
Common Mode Voltage specifications.
Updated to Preliminary Data Sheet. Default
state of CD_ENABLE corrected.
Updates throughout the document.
New Document.
Contents
1. Pin Out.................................................................................................................................................................3
1.1 Pin Assignment ...................................................................................................................................3
1.2 Pin Descriptions ..................................................................................................................................3
2. Electrical Characteristics................................................................................................................................6
2.1 Absolute Maximum Ratings ...........................................................................................................6
2.2 DC Electrical Characteristics ...........................................................................................................6
2.3 AC Electrical Characteristics ............................................................................................................8
3. Input/Output Circuits.................................................................................................................................. 10
4. Detailed Description.................................................................................................................................... 13
4.1 Equalizer Mode ................................................................................................................................. 13
4.1.1 Equalizer Mode Enable...................................................................................................... 13
4.1.2 Serial Digital Inputs (SDI/SDI).......................................................................................... 13
4.1.3 Automatic (Adaptive) Cable Equalization .................................................................. 13
4.1.4 Carrier Detect (CD) .............................................................................................................. 14
4.1.5 Squelch Adjust (EQ_SQ_ADJ) ......................................................................................... 14
4.1.6 Differential Digital Data Outputs (DDO/DDO).......................................................... 14
4.1.7 Adjustable Output Swing, De-Emphasis and Mute (EQ_OP_CTL)..................... 15
4.2 Cable Driver Mode .......................................................................................................................... 16
4.2.1 Cable Driver Mode Enable................................................................................................ 16
4.2.2 Differential Digital Data Inputs (DDI/DDI) .................................................................. 16
4.2.3 Serial Data Outputs (SDO/SDO) ..................................................................................... 16
4.2.4 Slew Rate Selection (CD_SD_EN)................................................................................... 17
4.2.5 Output Amplitude (R
SET
)................................................................................................... 17
5. Application Information............................................................................................................................. 18
5.1 Typical Application Circuit ........................................................................................................... 18
5.2 PCB Layout ......................................................................................................................................... 18
6. Package & Ordering Information ............................................................................................................ 19
6.1 Package Dimensions ...................................................................................................................... 19
6.2 Packaging Data ................................................................................................................................ 20
6.3 Recommended PCB Footprint .................................................................................................... 20
6.4 Marking Diagram ............................................................................................................................. 21
6.5 Solder Reflow Profiles .................................................................................................................... 21
6.6 Ordering Information ..................................................................................................................... 21
GS3490
Final Data Sheet
GENDOC-058568
www.semtech.com
Rev. 1
April 2014
2 of 22
Proprietary & Confidential
1. Pin Out
1.1 Pin Assignment
EQ_DISABLE
CD_ENABLE
RSET
VCC
VCC
VCC
26
VEE
SDO
SDO
VEE
VEE
SDI
SDI
EQ_GAIN_SEL
1
2
3
4
32
31
30
29
28
27
VEE
25
24
23
22
CD
VEE
DDO
DDO
VEE
VEE
DDI
DDI
VCC
5
6
7
8
9
10
11
GS3490
32-pin QFN
(top view)
21
20
19
18
17
12
13
14
15
16
Ground Pad
(bottom of package)
Figure 1-1: Pin Out
1.2 Pin Descriptions
Table 1-1: GS3490 Pin Descriptions
Pin Number
1, 4, 5, 11, 20, 21, 24, 25
2, 3
6, 7
Name
VEE
SDO/SDO
SDI/SDI
EQ_SQ_ADJ
EQ_BYPASS
EQ_OP_CTL
Type
Power
Output
Input
CD_SD_EN
AGC
AGC
VEE
NC
Description
Most negative power supply connection.
Connect to GND.
Serial data output.
Serial data input.
GS3490
Final Data Sheet
GENDOC-058568
www.semtech.com
Rev. 1
April 2014
3 of 22
Proprietary & Confidential
Table 1-1: GS3490 Pin Descriptions (Continued)
Pin Number
Name
Type
Description
Input Sensitivity Control.
Please refer to the input logic parameter in
Table 2-2: DC
Electrical Characteristics
for logic level threshold and
compatibility. This pin is a 3.3V input.
When HIGH, the device compensates for an additional 6dB
of loss across the entire operating band.
This pin has an internal 100kΩ pull-down resistor.
9, 10
12
AGC/AGC
NC
—
—
External AGC capacitor connection.
No Connect. Not bonded internally.
Equalizer Bypass Control.
13
EQ_BYPASS
Input
Please refer to the input logic parameter in
Table 2-2
for
Logic Level threshold and compatibility.
For details on operation, refer to
Section 4.1.3.
This pin has an internal 100kΩ pull-down resistor.
Squelch Threshold Adjust.
14
EQ_SQ_ADJ
Input
For details on operation, refer to
Section 4.1.5.
This pin has an internal 82.4kΩ pull-down resistor.
Controls the Output Swing, De-emphasis and Mute
features of the DDO/DDO outputs.
15
EQ_OP_CTL
Input
For details on operation, refer to
Section 4.1.7.
This pin has an internal 1MΩ pull-down resistor.
Cable Driver Slew Rate Control.
16
CD_SD_EN
Input
For details on operation, refer to
Section 4.2.4.
When left unconnected, the default state of this pin is logic
HIGH
17, 26, 31, 32
18, 19
22, 23
27
VCC
DDI/DDI
DDO/DDO
RSET
Power
Input
Output
—
Most positive power supply connection.
Connect to 3.3V DC.
Differential digital data input to cable driver core.
Differential digital data output from cable equalizer core.
External cable driver output amplitude control resistor
connection.
Equalizer Mode Disable Control.
28
EQ_DISABLE
Input
Please refer to the input logic parameter in
Table 2-2
for
logic level threshold and compatibility.
For details on operation, refer to
Section 4.1.1.
This pin has an internal 100kΩ pull-down resistor.
8
EQ_GAIN_SEL
Input
GS3490
Final Data Sheet
GENDOC-058568
www.semtech.com
Rev. 1
April 2014
4 of 22
Proprietary & Confidential
Table 1-1: GS3490 Pin Descriptions (Continued)
Pin Number
Name
Type
Description
Cable Driver Mode Enable Control.
Please refer to the input logic parameter in
Table 2-2
for
logic level threshold and compatibility.
For details on operation, refer to
Section 4.2.1.
When left unconnected, the default state of this pin is logic
LOW.
Equalizer Carrier Detect Status Output.
30
CD
Output
Please refer to the output logic parameter in
Table 2-2
for
logic level threshold and compatibility.
For details on operation, refer to
Section 4.1.4.
—
Center Pad
Power
Internally bonded to VEE.
For more details, refer to
Section 6.3.
29
CD_ENABLE
Input
GS3490
Final Data Sheet
GENDOC-058568
www.semtech.com
Rev. 1
April 2014
5 of 22
Proprietary & Confidential
京公网安备 11010802033920号
EEWORLD
