= 5 V. Minimum/maximum specifications apply over the entire recommended operation
range: 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V, −40°C ≤ T
A
≤ 125°C, unless otherwise noted. Switching specifications are tested with C
L
= 15 pF
and CMOS signal levels, unless otherwise noted.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
1
Codirectional
Opposing-Direction
Jitter
1
Symbol
PW
t
PHL
, t
PLH
PWD
A, WA Grades
Min
Typ Max
1000
1
50
10
7
B, WB Grades
Min Typ Max
40
25
35
3
3
C, WC Grades
Min Typ Max
10
20
23
100
29
2
1.5
9
Unit
ns
Mbps
ns
ns
ps/°C
ns
Test Conditions
Within PWD limit
Within PWD limit
50% input to 50%
output
|t
PLH
− t
PHL
|
Between any
two units at same
operating conditions
t
PSK
38
12
t
PSKCD
t
PSKOD
2
5
10
2
3
6
1
2
5
ns
ns
ns
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing-direction channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides
of the isolation barrier.
Table 2.
1 Mbps—A, B, C,
WA, WB, WC Grades
Min
Typ
Max
1.1
2.7
2.1
2.3
1.6
4.5
2.6
2.9
25 Mbps—B, C,
WB, WC Grades
Min Typ Max
6.2
4.8
4.9
4.7
7.0
7.0
6.0
6.4
100 Mbps—C,
WC Grades
Min Typ
Max
20
9.5
15
15.6
25
15
19
19
Parameter
SUPPLY CURRENT
ADuM1280/ADuM1285
ADuM1281/ADuM1286
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
Unit
mA
mA
mA
mA
Test Conditions
No load
Table 3. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
Symbol
V
IH
V
IL
V
OH
V
OL
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
−10
Min
0.7 V
DDx
0.3 V
DDx
V
DDx
− 0.1
V
DDx
− 0.4
5.0
4.8
0.0
0.2
+0.01
0.54
1.6
0.09
0.04
Typ
Max
Unit
V
V
V
V
V
V
µA
mA
mA
mA/Mbps
mA/Mbps
Test Conditions
0.1
0.4
+10
0.8
2.0
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −3.2 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 3.2 mA, V
Ix
= V
IxL
0 V ≤ V
Ix
≤ V
DDx
Rev. D | Page 3 of 18
ADuM1280/ADuM1281/ADuM1285/ADuM1286
Parameter
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDx
Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Refresh Period
1
Data Sheet
Max
Unit
V
V
V
ns
kV/µs
µs
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
Test Conditions
Symbol
V
DDXUV+
V
DDXUV-
V
DDXUVH
t
R
/t
F
|CM|
t
r
Min
Typ
2.75
2.65
0.1
2.5
35
1.6
25
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
o
> 0.8 V
DDx
. The common-mode voltage slew rates apply to both rising and
falling common-mode voltage edges.
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended operation
range: 3.135 V ≤ V
DD1
≤ 3.6 V, 3.135 V ≤ V
DD2
≤ 3.6 V, −40°C ≤ T
A
≤ 125°C, unless otherwise noted. Switching specifications are tested with C
L
=
15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
A, WA Grades
Parameter
Symbol
Min
Typ
Max
B, WB Grades
Min
Typ
Max
C, WC Grades
Min
Typ
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
1
Codirectional
Opposing-Direction
Jitter
1
PW
t
PHL
, t
PLH
PWD
1000
1
50
10
7
40
25
35
3
3
38
16
10
22
27
100
35
2.5
1.5
12
ns
Mbps
ns
ns
ps/°C
ns
Within PWD limit
Within PWD limit
50% input to 50%
output
|t
PLH
− t
PHL
|
Between any
two units at same
operating conditions
t
PSK
t
PSKCD
t
PSKOD
2
5
10
2
3
6
1
2.5
5
ns
ns
ns
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing-direction channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides
of the isolation barrier.
Table 5.
1 Mbps—A, B, C,
WA, WB, WC Grades
Min
Typ
Max
0.75
2.0
1.6
1.7
1.4
3.5
2.1
2.3
25 Mbps—B, C,
WB, WC Grades
Min Typ Max
5.1
2.7
3.8
3.9
9.0
4.6
5.0
6.2
100 Mbps—C,
WC Grades
Min Typ Max
17
4.8
11
11
23
9
15
15
Parameter
SUPPLY CURRENT
ADuM1280/ADuM1285
ADuM1281/ADuM1286
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
Unit
mA
mA
mA
mA
Test Conditions
No load
Rev. D | Page 4 of 18
Data Sheet
Table 6. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDX
Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Refresh Period
1
ADuM1280/ADuM1281/ADuM1285/ADuM1286
Symbol
V
IH
V
IL
V
OH
V
OL
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
V
DDxUV+
V
DDxUV−
V
DDxUVH
t
R
/t
F
|CM|
t
r
−10
Min
0.7 V
DDx
0.3 V
DDx
V
DDx
− 0.1
V
DDx
− 0.4
3.0
2.8
0.0
0.2
+0.01
0.4
1.2
0.08
0.015
2.75
2.65
0.1
3
35
1.6
Typ
Max
Unit
V
V
V
V
V
V
µA
mA
mA
mA/Mbps
mA/Mbps
V
V
V
ns
kV/µs
µs
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
Test Conditions
0.1
0.4
+10
0.6
1.7
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −3.2 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 3.2 mA, V
Ix
= V
IxL
0 V ≤ V
Ix
≤ V
DDx
25
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
o
> 0.8 V
DDX.
The common-mode voltage slew rates apply to both rising and
falling common-mode voltage edges.
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= 5 V, V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ V
DD1
≤ 5.5 V, 3.135 V ≤ V
DD2
≤ 3.6 V; and −40°C ≤ T
A
≤ 125°C, unless otherwise noted. Switching specifications are
tested with C
L
= 15 pF and CMOS signal levels unless otherwise noted.
Table 7.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
1
Codirectional
Opposing-Direction
Jitter
1
Symbol
PW
t
PHL
, t
PLH
PWD
A, WA Grades
Min
Typ Max
1000
1
50
10
7
B, WB Grades
Min Typ Max
40
25
35
3
3
C, WC Grades
Min Typ Max
10
20
25
100
31
2
1.5
12
Unit
ns
Mbps
ns
ns
ps/°C
ns
Test Conditions
Within PWD limit
Within PWD limit
50% input to 50%
output
|t
PLH
− t
PHL
|
Between any
two units at same
operating conditions
t
PSK
38
16
t
PSKCD
t
PSKOD
2
5
10
2
3
6
1
2
5
ns
ns
ns
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation
barrier. Opposing-direction channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides
[i=s] This post was last edited by dontium on 2015-1-23 11:17 [/i] [color=#000][backcolor=rgb(237, 235, 235)][font=微软雅黑][size=18px][b]250 kinds of power amplifier circuits complete collection [/b][/si...
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