EEWORLDEEWORLDEEWORLD

Part Number

Search

74LVC574APW112

Description
Flip Flops 3.3V OCTAL D FF POS
Categorysemiconductor    logic   
File Size787KB,19 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

74LVC574APW112 Online Shopping

Suppliers Part Number Price MOQ In stock  
74LVC574APW112 - - View Buy Now

74LVC574APW112 Overview

Flip Flops 3.3V OCTAL D FF POS

74LVC574APW112 Parametric

Parameter NameAttribute value
Product CategoryFlip Flops
ManufacturerNXP
RoHSDetails
Number of Circuits1
Logic FamilyLVC
Logic TypeD-Type Edge Triggered Flip-Flop
PolarityNon-Inverting
Input TypeSingle-Ended
Propagation Delay Time3.2 ns at 3.3 V
High Level Output Current- 24 mA
Supply Voltage - Max3.6 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 125 C
Mounting StyleSMD/SMT
Package / CaseSOT-360
PackagingTube
Height0.95 mm
Length6.6 mm
Number of Input Lines8
Number of Output Lines8
Operating Supply Voltage1.8 V, 2.5 V, 3.3 V
Quiescent Current100 nA
Factory Pack Quantity1875
Supply Voltage - Min1.2 V
Width4.5 mm
Unit Weight0.000212 oz
74LVC574A
Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive
edge-trigger; 3-state
Rev. 5 — 18 December 2012
Product data sheet
1. General description
The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each
flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output
Enable (OE) input are common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs that meet the set-up and
hold times requirements on the LOW to HIGH CP transition.
When OE is LOW, the contents of the eight flip-flops are available at the outputs. When
OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input
does not affect the state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V or 5 V applications.
The 74LVC574A is functionally identical to the 74LVC374A, but has a different pin
arrangement.
2. Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance when V
CC
= 0 V
8-bit positive edge-triggered register
Independent register and 3-state buffer operation
Flow-through pin-out architecture
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C

74LVC574APW112 Related Products

74LVC574APW112 74LVC574ABQ115 74LVC574AD112
Description Flip Flops 3.3V OCTAL D FF POS Gate Drivers CURRNT High Side 30mOhms 50A 65V Real Time Clock 32.768KHz 3.0Volts 5+/-5ppm -40C +85C
Product Category Flip Flops Flip Flops Flip Flops
Manufacturer NXP NXP NXP
RoHS Details Details Details
Number of Circuits 1 1 1
Logic Family LVC LVC LVC
Logic Type D-Type Edge Triggered Flip-Flop D-Type Edge Triggered Flip-Flop D-Type Edge Triggered Flip-Flop
Polarity Non-Inverting Non-Inverting Non-Inverting
Input Type Single-Ended Single-Ended Single-Ended
Propagation Delay Time 3.2 ns at 3.3 V 3.2 ns at 3.3 V 3.2 ns at 3.3 V
High Level Output Current - 24 mA - 24 mA - 24 mA
Supply Voltage - Max 3.6 V 3.6 V 3.6 V
Minimum Operating Temperature - 40 C - 40 C - 40 C
Maximum Operating Temperature + 125 C + 125 C + 125 C
Mounting Style SMD/SMT SMD/SMT SMD/SMT
Package / Case SOT-360 SOT-764 SOT-163
Height 0.95 mm 0.95 mm 2.45 mm
Length 6.6 mm 4.5 mm 13 mm
Number of Input Lines 8 8 8
Number of Output Lines 8 8 8
Operating Supply Voltage 1.8 V, 2.5 V, 3.3 V 1.8 V, 2.5 V, 3.3 V 1.8 V, 2.5 V, 3.3 V
Quiescent Current 100 nA 100 nA 100 nA
Factory Pack Quantity 1875 3000 1520
Supply Voltage - Min 1.2 V 1.2 V 1.2 V
Width 4.5 mm 2.5 mm 7.6 mm
Packaging Tube Cut Tape Tube
MSP430 Development Considerations and Requirements
[size=4]The following is a summary of using MSP430: [/size] [size=4]1. System clock problem: [/size] [size=4] The system uses DCO by default. When using an external high-speed crystal oscillator XT2, ...
fish001 Microcontroller MCU
Driver-free USB camera supporting MJPEG format
Looking to buy a second-hand USB driver-free camera that supports MJPEG format and has higher pixels, for use in openwrt system for testing....
wateras1 Buy&Sell
Why Ultra Wideband?
Ultra-wideband brings a wealth of capabilities to applications that require precise timing and accurate position detection. This blog explores the various features of ultra-wideband that help enable h...
石榴姐 RF/Wirelessly
NI China Branch has implemented a direct sales model since 2006
----Local users can enjoy more favorable product prices, faster delivery services and the same high-quality technical support.National Instruments China Co., Ltd. (NI) announced that it will officiall...
rain MCU
Microchip Live at 10:30 AM today | Securely configure the MPU in your factory
Secure provisioning is a process that allows you to securely instantiate a microprocessor ( MPU) root of trust. In this webinar, Microchip will explain why secure provisioning is important for MPU-bas...
EEWORLD社区 Industrial Control Electronics
EEWORLD University ---- Introduction to TPS56x201/8 DC Buck
Introduction to TPS56x201/8 DC Buck : https://training.eeworld.com.cn/course/4172...
hi5 Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2450  629  1487  2711  1808  50  13  30  55  37 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号