Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/
4-Channel,
iCMOS
Multiplexers/Matrix Switches
Data Sheet
FEATURES
Serial interface up to 50 MHz
SDO daisy-chaining option
9.5 Ω on resistance at 25°C
1.6 Ω on-resistance flatness
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Rail-to-rail operation
20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP
ADG1438/ADG1439
FUNCTIONAL BLOCK DIAGRAMS
ADG1438
S1
D
S8
INPUT SHIFT
REGISTER
SDO
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avionics
Battery-powered systems
Communication systems
Medical equipment
SCLK SYNC DIN RESET
Figure 1.
ADG1439
S1A
DA
S4A
GENERAL DESCRIPTION
The
ADG1438
and
ADG1439
are CMOS analog matrix switches
with a serially controlled 3-wire interface. The
ADG1438
is an
8-channel matrix switch, and the
ADG1439
is a dual 4-channel
matrix switch.
The
ADG1438/ADG1439
use a versatile 3-wire serial interface
that operates at clock rates of up to 50 MHz and is compatible
with standard SPI, QSPI™, MICROWIRE™, and DSP interface
standards. The output of the shift register, SDO, enables a number
of the
ADG1438/ADG1439
devices to be daisy-chained. On
power-up, the internal shift register contains all zeros, and all
switches are in the off state.
Each switch conducts equally well in both directions when on,
making these devices suitable for both multiplexing and
demultiplexing applications. Because each switch is turned on
or off by a separate bit, these devices can also be configured as a
type of switch array, where any, all, or none of the eight switches
can be closed at any time. The input signal range extends to the
supply rails. All channels exhibit break-before-make switching
action, preventing momentary shorting when switching channels.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and
gain switching applications where low distortion is critical.
iCMOS®
construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
Rev. B
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
S1B
DB
S4B
INPUT SHIFT
REGISTER
SDO
08496-002
SCLK SYNC DIN RESET
Figure 2.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
50 MHz serial interface.
9.5 Ω on resistance.
1.6 Ω on-resistance flatness.
3 V logic-compatible digital input, V
INH
= 2.0 V, V
INL
= 0.8 V.
Table 1. Related Devices
Device No.
ADG1408/ADG1409
Description
Low on resistance, parallel
interface, 4-/8-channel ±15 V
multiplexers
08496-001
ADG1438/ADG1439
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
12 V Single Supply ........................................................................ 5
±5 V Dual Supply ......................................................................... 7
Continuous Current per Channel .............................................. 8
Timing Characteristics ................................................................ 9
Timing Diagrams.......................................................................... 9
Absolute Maximum Ratings.......................................................... 10
Data Sheet
Thermal Resistance .................................................................... 10
ESD Caution................................................................................ 10
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 13
Test Circuits ..................................................................................... 16
Terminology .................................................................................... 18
Theory of Operation ...................................................................... 19
Serial Interface ............................................................................ 19
Input Shift Register .................................................................... 19
Power-On Reset .......................................................................... 19
Daisy-Chaining ........................................................................... 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
3/16—Rev. A to Rev. B
Changed CP-20-4 to CP-20-10 .................................... Throughout
Changes to Figure 5, Figure 6, and Table 10 ............................... 11
Changes to Figure 7, Figure 8, and Table 11 ............................... 12
Changes to Figure 29 ...................................................................... 16
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 20
5/10—Rev. 0 to Rev. A
Changes to Channel On Leakage, ID, IS (On) +25°C
Parameter, Table 2 .................................................................................... 3
10/09—Revision 0: Initial Version
Rev. B | Page 2 of 20
Data Sheet
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= –15 V ± 10%, V
L
= 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
+25°C
−40°C to
+85°C
−40°C to
+125°C
V
SS
to V
DD
9.5
11.5
0.55
1
1.6
1.9
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
ADG1438
ADG1439
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
Digital Input Capacitance, C
IN
LOGIC OUTPUTS (SDO)
Output Low Voltage, V
OL 1
High Impedance Leakage Current
High Impedance Output
Capacitance
1
DYNAMIC CHARACTERISTICS
1
Break-Before-Make Time Delay,
t
BBM
Transition Time, t
TRANSITION
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion (THD + N)
±0.05
±0.15
±0.05
±0.25
±0.25
±0.1
±0.3
14
16
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
V max
V max
µA typ
µA max
pF typ
ADG1438/ADG1439
Test Conditions/Comments
V
DD
= +13.5 V, V
SS
= −13.5 V, V
S
= ±10 V,
I
S
= −10 mA; see Figure 27.
V
DD
= +13.5 V, V
SS
= −13.5 V, V
S
= ±10 V,
I
S
= −10 mA.
V
DD
= +13.5 V, V
SS
= −13.5 V, V
S
= ±10 V,
I
S
= −10 mA.
V
DD
= +16.5 V, V
SS
= −16.5 V.
V
S
= ±10 V, V
D
=
∓10
V; see Figure 28.
V
S
= ±10 V, V
D
=
∓10
V; see Figure 28.
V
S
= V
D
= ±10 V; see Figure 29.
On-Resistance Match Between
Channels (ΔR
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
1.5
1.7
2.15
2.3
±1
±3
±1.5
±3
±2
±12
±6
±12
2.0
0.8
±0.001
±0.1
4
0.4
0.6
0.001
±1
4
V
IN
= V
GND
or V
L
.
I
SINK
= 3 mA.
I
SINK
= 6 mA.
55
30
80
100
4
−70
−70
0.057
120
130
ns typ
ns min
ns typ
ns max
pC typ
dB typ
dB typ
% typ
R
L
= 100 Ω, C
L
= 35 pF.
V
S1
= V
S2
= 10 V; see Figure 31.
R
L
= 100 Ω, C
L
= 35 pF.
V
S
= 10 V; see Figure 30.
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32.
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 33.
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 34.
R
L
= 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz;
see Figure 36.
Rev. B | Page 3 of 20
ADG1438/ADG1439
Parameter
−3 dB Bandwidth
ADG1438
ADG1439
Insertion Loss
C
S
(Off )
C
D
(Off )
ADG1438
ADG1439
C
D
, C
S
(On)
ADG1438
ADG1439
POWER REQUIREMENTS
I
DD
I
L
Inactive
I
L
Active − 30 MHz
I
L
Active − 50 MHz
I
SS
V
DD
/V
SS
1
Data Sheet
+25°C
82
130
0.7
9
58
28
286
139
0.001
1
0.3
1
0.26
0.3
0.42
0.5
0.001
1
±4.5/±16.5
0.55
0.35
−40°C to
+85°C
−40°C to
+125°C
Unit
MHz typ
MHz typ
dB typ
pF typ
pF typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
mA typ
mA max
mA typ
mA max
µA typ
µA max
V min/V max
Test Conditions/Comments
R
L
= 50 Ω, C
L
= 5 pF; see Figure 35.
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 35.
f = 1 MHz.
f = 1 MHz.
f = 1 MHz.
f = 1 MHz.
f = 1 MHz.
V
DD
= +16.5 V, V
SS
= −16.5 V.
Digital inputs = 0 V or V
L
.
Digital inputs = 0 V or V
L
.
Digital inputs toggle between 0 V and V
L
.
Digital inputs toggle between 0 V and V
L
.
Digital inputs = 0 V or V
L
.
Guaranteed by design, not subject to production test.
Rev. B | Page 4 of 20
Data Sheet
12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, V
L
= 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
+25°C
−40°C to
+85°C
−40°C to
+125°C
0 to V
DD
18
21.5
0.55
1.2
On-Resistance Flatness (R
FLAT(ON)
)
5
6
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
ADG1438
ADG1439
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
Digital Input Capacitance, C
IN
LOGIC OUTPUTS (SDO)
Output Low Voltage, V
OL 1
High Impedance Leakage Current
High Impedance Output
Capacitance
1
DYNAMIC CHARACTERISTICS
1
Break-Before-Make Time Delay, t
BBM
Transition Time, t
TRANSITION
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
ADG1438
ADG1439
±0.02
±0.15
±0.02
±0.25
±0.25
±0.05
±0.3
6.9
7.3
26
28.5
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
V max
V max
µA typ
µA max
pF typ
ADG1438/ADG1439
Test Conditions/Comments
V
DD
= 10.8 V, V
SS
= 0 V; V
S
= 0 V to 10 V,
I
S
= −10 mA; see Figure 27.
V
DD
= 10.8 V, V
SS
= 0 V; V
S
= 0 V to 10 V, I
S
=
−10 mA.
V
DD
= 10.8 V, V
SS
= 0 V; V
S
= 0 V to 10 V, I
S
=
−10 mA.
V
DD
= 10.8 V.
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 28.
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 28.
On-Resistance Match Between
Channels (ΔR
ON
)
1.6
1.8
±1
±3
±1.5
±3
±2
±12
±6
±12
2.0
0.8
V
S
= V
D
= 1 V or 10 V; see Figure 29.
±0.001
±0.1
4
0.4
0.6
0.001
±1
4
V
IN
= V
GND
or V
L
.
I
SINK
= 3 mA.
I
SINK
= 6 mA.
115
60
155
195
7
−70
−70
58
105
235
260
ns typ
ns min
ns typ
ns max
pC typ
dB typ
dB typ
MHz typ
MHz typ
R
L
= 100 Ω, C
L
= 35 pF.
V
S1
= V
S2
= 8 V; see Figure 31.
R
L
= 100 Ω, C
L
= 35 pF.
V
S
= 8 V; see Figure 30.
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32.
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 33.
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 34.
R
L
= 50 Ω, C
L
= 5 pF; see Figure 35.
Rev. B | Page 5 of 20
京公网安备 11010802033920号
EEWORLD
