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TO
-22
0A
B
BUK7514-55A
N-channel TrenchMOS standard level FET
Rev. 2 — 26 April 2011
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
1.3 Applications
Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
drain-source on-state
resistance
non-repetitive
drain-source
avalanche energy
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
I
D
= 50 A; V
sup
≤
25 V;
R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25 °C;
unclamped
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
mb
= 25 °C
Min
-
-
-
-
Typ
-
-
-
12
Max
55
73
166
14
Unit
V
A
W
mΩ
Static characteristics
Avalanche Ruggedness
E
DS(AL)S
-
-
125
mJ
NXP Semiconductors
BUK7514-55A
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base;
connected to drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
1 2 3
SOT78A (TO-220AB)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK7514-55A
TO-220AB
Description
plastic single-ended package; heatsink mounted;
1 mounting hole; 3-lead TO-220AB
Version
SOT78A
Type number
BUK7514-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 April 2011
2 of 12
NXP Semiconductors
BUK7514-55A
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; T
mb
= 25 °C
I
D
= 50 A; V
sup
≤
25 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
T
mb
= 25 °C
T
mb
= 100 °C
T
mb
= 25 °C; pulsed
T
mb
= 25 °C
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
Max
55
55
20
73
52
266
166
175
175
73
266
125
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche Ruggedness
100
P
der
(%)
80
003aaf237
100
I
D
(%)
80
003aaf238
60
60
40
40
20
20
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
V
GS
≥
5 V
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature
Fig 2.
Normalized continuous drain current as a
function of mounting base temperature
BUK7514-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 April 2011
3 of 12
NXP Semiconductors
BUK7514-55A
N-channel TrenchMOS standard level FET
10
3
I
DM
(A)
10
2
R
DS(on)
= V
DS
/ I
D
t
p
= 1
μs
10
μs
100
μs
10
D.C.
1 ms
10 ms
100 ms
1
1
10
10
2
003aaf239
120
WDSS
(%)
80
003aaf251
40
10
3
V
DS
(V)
0
20
60
100
140
180
T
(mb)
(°C)
Fig 3.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
Fig 4.
Normalised drain-source non-repetitive
avalanche energy as a function of
mounting-base temperature
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to mounting base
thermal resistance from
junction to ambient
in free air
Conditions
Min
-
-
Typ
-
60
Max
0.9
-
Unit
K/W
K/W
1
Z
th(j-mb)
(K/W)
10
−1
δ
= 0.5
0.2
0.1
0.05
0.02
10
−2
0
t
p
P
003aaf240
δ
=
t
p
T
t
T
10
−3
10
−7
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
t
p
(s)
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7514-55A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 April 2011
4 of 12
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