MC100EPT23MNR4G datasheet, PDF

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MC100EPT23MNR4G: DescriptionTranslation - Voltage Levels 3.3V Dual Diff LVPECL to LVTTL; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size125KB，8 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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MC100EPT23MNR4G Overview

Translation - Voltage Levels 3.3V Dual Diff LVPECL to LVTTL

MC100EPT23MNR4G Parametric

Parameter Name	Attribute value
Brand Name	ON Semiconductor
Is it lead-free?	Lead free
Parts packaging code	DFN
package instruction	HVSON, SOLCC8,.08,20
Contacts	8
Manufacturer packaging code	506AA
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
maximum delay	1.8 ns
Interface integrated circuit type	PECL TO TTL TRANSLATOR
JESD-30 code	S-PDSO-N8
length	2 mm
Humidity sensitivity level	1
Number of digits	1
Number of functions	2
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output latch or register	NONE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	HVSON
Encapsulate equivalent code	SOLCC8,.08,20
Package shape	SQUARE
Package form	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	ECL
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Gold/Palladium (Ni/Au/Pd)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	2 mm
Base Number Matches	1

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MC100EPT23

3.3V Dual Differential

LVPECL/LVDS/CML to

LVTTL/LVCMOS Translator

The MC100EPT23 is a dual differential LVPECL/LVDS/CML to

LVTTL/LVCMOS translator. Because LVPECL (Positive ECL),

LVDS, and positive CML input levels and LVTTL/LVCMOS output

levels are used, only +3.3 V and ground are required. The small

outline 8-lead SOIC package and the dual gate design of the EPT23

makes it ideal for applications which require the translation of a clock

or data signal.

The EPT23 is available in only the ECL 100K standard. Since there

are no LVPECL outputs or an external V

reference, the EPT23 does

not require both ECL standard versions. The LVPECL/LVDS inputs

are differential. Therefore, the MC100EPT23 can accept any standard

differential LVPECL/LVDS input referenced from a V

of +3.3 V.

Features

http://onsemi.com

MARKING

DIAGRAMS*

SOIC−8

D SUFFIX

CASE 751

KPT23

ALYW

TSSOP−8

DT SUFFIX

CASE 948R

KA23

ALYWG

Pb−Free Packages are Available

DFN8

MN SUFFIX

CASE 506AA

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Date Code

= Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Semiconductor Components Industries, LLC, 2010

July, 2010

−

Rev. 18

Publication Order Number:

MC100EPT23/D

3T M

•

1.5 ns Typical Propagation Delay

Maximum Operating Frequency > 275 MHz

LVPECL/LVDS/CML Inputs, LVTTL/LVCMOS Outputs

24 mA LVTTL Outputs

Operating Range: V

= 3.0 V to 3.6 V with GND = 0 V

MC100EPT23MNR4G Related Products

	MC100EPT23MNR4G	MC100EPT23D	MC100EPT23DTR2
Description	Translation - Voltage Levels 3.3V Dual Diff LVPECL to LVTTL	Translation - Voltage Levels 3.3V Dual Diff	Translation - Voltage Levels 3.3V Dual Diff
Parts packaging code	DFN	SOIC	SOIC
package instruction	HVSON, SOLCC8,.08,20	SOP, SOP8,.25	PLASTIC, TSSOP-8
Contacts	8	8	8
Reach Compliance Code	compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99
maximum delay	1.8 ns	1.8 ns	1.8 ns
Interface integrated circuit type	PECL TO TTL TRANSLATOR	PECL TO TTL TRANSLATOR	PECL TO TTL TRANSLATOR
JESD-30 code	S-PDSO-N8	R-PDSO-G8	S-PDSO-G8
length	2 mm	4.9 mm	3 mm
Number of digits	1	1	1
Number of functions	2	2	2
Number of terminals	8	8	8
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output latch or register	NONE	NONE	NONE
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HVSON	SOP	TSSOP
Encapsulate equivalent code	SOLCC8,.08,20	SOP8,.25	TSSOP8,.19
Package shape	SQUARE	RECTANGULAR	SQUARE
Package form	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	240	240
power supply	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	1.75 mm	1.1 mm
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES
technology	ECL	ECL	ECL
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Gold/Palladium (Ni/Au/Pd)	Tin/Lead (Sn80Pb20)	Tin/Lead (Sn90Pb10)
Terminal form	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.5 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	40	30	30
width	2 mm	3.9 mm	3 mm
Factory Lead Time	1 week	1 week	-
Is it Rohs certified?	-	incompatible	incompatible
Maker	-	ON Semiconductor	ON Semiconductor
JESD-609 code	-	e0	e0

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