Changes to Ordering Guide .......................................................... 18
12/09—Revision 0: Initial Version
Rev. D | Page 2 of 20
Data Sheet
SPECIFICATIONS
ADP124/ADP125
Unless otherwise noted, V
IN
= (V
OUT
+ 0.5 V) or 2.3 V, whichever is greater; ADJ connected to VOUT; I
OUT
= 10 mA; C
IN
= 1.0
µF;
C
OUT
= 1.0
µF;
T
A
= 25°C.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
1
Symbol
V
IN
I
GND
Test Conditions
I
OUT
= 0 µA
I
OUT
= 0 µA, T
J
= −40°C to +125°C
I
OUT
= 1 mA
I
OUT
= 1 mA, T
J
= −40°C to +125°C
I
OUT
= 250 mA
I
OUT
= 250 mA, T
J
= −40°C to +125°C
I
OUT
= 500 mA
I
OUT
= 500 mA, T
J
= −40°C to +125°C
EN = GND
EN = GND, T
J
= −40°C to +125°C
I
OUT
= 10 mA
100 µA < I
OUT
< 500 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V,
T
J
= −40°C to +125°C
I
OUT
= 10 mA
100 µA < I
OUT
< 500 mA, V
IN
= 2.3 V to 5.5 V,
T
J
= −40°C to +125°C
V
IN
= V
IN
= 2.3 V to 5.5 V, T
J
= −40°C to +125°C
I
OUT
= 1 mA to 500 mA
I
OUT
= 1 mA to 500 mA, T
J
= −40°C to +125°C
2.3 V ≤ V
IN
≤ 5.5 V, ADJ connected to VOUT
I
OUT
= 10 mA, V
OUT
> 2.3 V
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 250 mA, V
OUT
> 2.3 V
I
OUT
= 250 mA, T
J
= −40°C to +125°C
I
OUT
= 500 mA, V
OUT
> 2.3V
I
OUT
= 500 mA, T
J
= −40°C to +125°C
V
OUT
= 3.0 V
550
T
J
rising
−1
−2
Min
2.3
Typ
45
105
60
120
160
210
210
280
0.1
1
+1
+1.5
Max
5.5
Unit
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
%
%
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY
2
Fixed Output
I
SD
V
OUT
Adjustable Output
0.495
0.485
−0.05
0.0005
0.001
15
3
5
65
120
130
230
350
750
150
15
1.2
0.4
0.1
1
2.1
1.5
125
1000
0.500
0.500
0.505
0.515
+0.05
V
V
%/V
%/mA
%/mA
nA
mV
mV
mV
mV
mV
mV
µs
mA
°C
°C
V
V
µA
µA
V
V
mV
LINE REGULATION
LOAD REGULATION
3
ADJ INPUT BIAS CURRENT
DROPOUT VOLTAGE
4
∆V
OUT
/∆V
IN
∆V
OUT
/∆I
OUT
ADJ
I-BIAS
V
DROPOUT
START-UP TIME
5
CURRENT LIMIT THRESHOLD
6
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
EN Input Logic High
EN Input Logic Low
EN Input Leakage Current
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
t
START-UP
I
LIMIT
TS
SD
TS
SD-HYS
V
IH
V
IL
V
I-LEAKAGE
UVLO
UVLO
RISE
UVLO
FALL
UVLO
HYS
2.3 V ≤ V
IN
≤ 5.5 V
2.3 V ≤ V
IN
≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
T
J
= −40°C to +125°C
T
A
= 25°C
Rev. D | Page 3 of 20
ADP124/ADP125
Parameter
OUTPUT NOISE
Symbol
OUT
NOISE
Test Conditions
10 Hz to 100 kHz, V
IN
= 5.5 V, V
OUT
= 1.2 V
10 Hz to 100 kHz, V
IN
= 5.5 V, V
OUT
= 1.8 V
10 Hz to 100 kHz, V
IN
= 5.5 V, V
OUT
= 2.5 V
10 Hz to 100 kHz, V
IN
= 5.5 V, V
OUT
= 3.3 V
10 Hz to 100 kHz, V
IN
= 5.5 V, V
OUT
= 4.2V
10 kHz to 100 kHz, V
OUT
= 1.8 V, 2.5 V, 3.3 V
Min
Typ
25
35
45
55
65
60
Data Sheet
Max
Unit
µV rms
µV rms
µV rms
µV rms
µV rms
dB
POWER SUPPLY REJECTION RATIO
(V
IN
= V
OUT
+1V)
1
2
PSRR
The current from the external resistor divider network in the case of adjustable voltage output (as with the
ADP125)
should be subtracted from the ground current measured.
Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of
the resistors used.
3
Based on an endpoint calculation using 1 mA and 500 mA loads.
4
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages
greater than 2.3 V.
5
Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
6
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.3 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.3 V, or 2.97 V.
RECOMMENDED CAPACITOR SPECIFICATIONS
Table 2.
Parameter
Minimum Input and Output
Capacitance
1
Capacitor ESR
1
Symbol
CAP
MIN
R
ESR
Test Conditions
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
0.70
0.001
Typ
Max
Unit
µF
Ω
1
The minimum input and output capacitance should be greater than 0.70 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with this LDO.
Rev. D | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
ADJ to GND
EN to GND
VOUT to GND
Storage Temperature Range
Operating Ambient Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to +6.5 V
−0.3 V to VIN
−65°C to +150°C
−40°C to +85°C
−40°C to +125°C
JEDEC J-STD-020
ADP124/ADP125
application and board layout. In applications in which high maxi-
mum power dissipation exists, close attention to thermal board
design is required. The value of θ
JA
may vary, depending on PCB
material, layout, and environmental conditions. The specified
values of θ
JA
are based on a 4-layer, 4 inch × 3 inch circuit board.
Refer to JESD 51-7 for detailed information on the board
construction.
Ψ
JB
is the junction-to-board thermal characterization parameter
and is measured in °C/W. The Ψ
JB
of the package is based on
modeling and calculation using a 4-layer board. The
Guidelines for
Reporting and Using Package Thermal Information: JESD51-12
states that thermal characterization parameters are not the same
as thermal resistances. Ψ
JB
measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ
JB
. Therefore, Ψ
JB
thermal paths include
convection from the top of the package as well as radiation from
the package—factors that make Ψ
JB
more useful in real-world
applications. Maximum junction temperature (T
J
) is calculated
from the board temperature (T
B
) and power dissipation (P
D
)
using the formula
T
J
=
T
B
+ (P
D
× Ψ
JB
)
Refer to JESD51-8 and JESD51-12 for more detailed information
about Ψ
JB
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The
ADP124/ADP125
can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that T
J
will remain within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may have to be limited.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T
J
) of
the device is dependent on the ambient temperature (T
A
), the
power dissipation of the device (P
D
), and the junction-to-ambient
thermal resistance of the package (θ
JA
).
Maximum junction temperature (T
J
) is calculated from the
ambient temperature (T
A
) and power dissipation (P
D
) using the
formula
T
J
=
T
A
+ (P
D
×
θ
JA
)
The junction-to-ambient thermal resistance (θ
JA
) of the package
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
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