Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional
operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE
MAXIMUM RATlNG conditions for extended periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Devices are ESD sensitive. Handling precautions recommended.
Note 2.
Note 3.
DC ELECTRICAL CHARACTERISTICS
Power Supply
:
T
A
= –40°C to +85°C
Symbol
V
CCI
, V
CCO
I
CCI
I
CCO
Note 4.
Parameter
V
CC
Core, V
CC
Output
I
CC
Core
I
CC
Output
Condition
Note 4
Max. V
CC
No Load, Max. V
CC
Min
3.0
Typ
3.3
46
175
Max
3.6
70
260
Units
V
mA
mA
V
CCI
and V
CCO
must be connected together on the PCB such that they remain at the same potential. V
CCI
and V
CCO
are not internally
connected on the die.
LVDS Input
:
V
CC
= 3.3V
±10%,
T
A
= –40°C to +85°C
Symbol
V
IN
V
ID
I
IL
R
IN
Parameter
Input Voltage Range
Differential Input Swing
Input LOW Current
LVDS Differential Input Resistance
(LVDS_CLK to /LVDS_CLK)
Condition
Min
0
100
–1.25
80
100
120
Typ
Max
2.4
Units
V
mV
mA
Ω
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge
®
SY89826L
DC ELECTRICAL CHARACTERISTICS
LVPECL Input:
V
CC
= 3.3V
±10%,
T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
V
PP
V
CMR
I
IH
I
IL
Note 6.
Note 7.
Parameter
Input HIGH Voltage (Single-Ended)
Input LOW Voltage
Minimum Input Swing (LVPECL_CLK)
Condition
Min
V
CC
–1.165
V
CC
–1.945
Typ
Max
V
CC
–0.880
V
CC
–1.625
V
CCI
–0.4
150
Units
V
V
mV
V
µA
µA
Note 6
300
GNDI +1.8
Common Mode Range (LVPECL_CLK)
Note 7
Input HIGH Current
Input LOW Current
0.5
The V
PP
(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
V
CMR
is defined as the range within which the V
IH
level may vary, with the device still meeting the propagation delay specification. The
numbers in the table are referenced to V
CCI
. The V
IL
level must be such that the peak-to-peak voltage is less than 1.0V and greater than or
equal to V
PP
(min.). V
CMR
range varies 1:1 with V
CCI
. V
CMR
(min) is fixed at GNDI +1.8V.
CMOS/LVTTL Inputs:
V
CC
= 3.3V
±10%,
T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
V
IN
= V
CC
V
IN
= 0.5V
–600
Condition
Min
2.0
0.8
150
Typ
Max
Units
V
V
µA
µA
LVDS Output
:
V
CC
= 3.3V
±10%,
T
A
= –40°C to +85°C
Symbol
V
OD
V
OH
V
OL
V
OCM
∆V
OCM
Note 8.
Note 9.
Parameter
Differential Output Voltage
Output HIGH Voltage
Output LOW Voltage
Output Common Mode Voltage
Change in Common Mode Voltage
Condition
Note 8, 9
Note 8
Note 8
Note 9
Min
250
Typ
350
Max
400
1.474
Units
mV
V
V
0.925
1.125
–50
1.375
50
V
mV
Measured as per Figure 3, 100Ω across Q and /Q outputs.
Measured as per Figure 4.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY89826L
AC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 3.3V
±10%,
T
A
= –40°C to +85°C, unless noted.
Symbol
f
MAX
t
PHL
t
PLH
Parameter
Maximum Toggle Frequency
Differential Propagation Delay,
Note 3
Condition
Note 2
LVPECL Input: 150mV
LVPECL Input: 800mV
LVDS Input: 100mV
LVDS Input: 400mV
t
SWITCHOVER
t
S(OE)
t
H(OE)
t
skew
Clock Input Switchover
Output Enable Set-Up Time
Output Enable Hold Time
Within Device Skew
Part-to-Part Skew
t
JITTER
t
r
, t
f
Note 1.
Note 2.
Note 3.
Note 4.
Min
1.0
0.750
0.6
0.950
0.800
Typ
Max
Units
GHz
1.0
0.850
1.2
1.0
1.4
1.250
1.10
1.450
1.30
1.7
ns
ns
ns
ns
ns
ns
ns
CLK_SEL-to-Valid Output
Note 4
Note 4
Note 5
Note 6
Note 7
Note 8
200
0°C to +85°C
–40°C
1.0
0.5
25
50
75
400
ps
ps
ps
ps
RMS
ps
PP
ps
Cycle-to-Cycle
Total Jitter
Output Rise/Fall Times
(20% to 80%)
<1
290
1
2
400
Note 5.
Note 6.
Note 7.
Note 8.
100Ω termination between Q and /Q outputs. Airflow
≥300lfpm,
or exposed pad soldered to ground plane. Typicals are at nominal supply,
T
A
= 25°C.
f
MAX
is defined as the maximum toggle frequency, measured with a 750mV LVPECL input or 350mV LVDS input. Output swing is
≥
200mV.
Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
Set-up and hold time applies to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications,
set-up and hold time does not apply. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures
outputs remain disabled during the next clock cycle. OE LOW to HIGH transition enables normal operation of the next input clock.
The within-device skew is defined as the worst case difference between any two similar delay paths within a single device with identical input
transition, operating at the same voltage and temperature.
The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same voltage
and temperature. Part-to-part skew is the total skew difference; pin-to-pin skew + part-to-part skew.
Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. T
JITTER_CC
=T
n
–T
n+1
where T is the time between rising edges of the output signal.
Total jitter definition: with an ideal clock input, no more than one output edge in 10
12
output edges will deviate by more than the specified peak-to-
京公网安备 11010802033920号
EEWORLD
