®
I GNS
DE S
NE W
FO R
441
ED
ISL6
EN D
Data
MM EFER TO
December 1, 2004
O
Sheet
R EC
R
T
NO
A SE
PL E
ISL6402A
FN9010.3
1.4MHz Dual, 180° Out-of-Phase, Step-
Down PWM and Single Linear Controller
The ISL6402A is a high-performance, triple-output controller
optimized for converting wall adapter, battery or network
intermediate bus DC input supplies into the system supply
voltages required for a wide variety of applications. Each
output is adjustable down to 0.8V. The two PWMs are
synchronized 180
o
out of phase reducing the RMS input
current and ripple voltage.
The ISL6402A incorporates several protection features. An
adjustable overcurrent protection circuit monitors the output
current by sensing the voltage drop across the lower
MOSFET. Hiccup mode overcurrent operation protects the
DC-DC components from damage during output
overload/short circuit conditions. Each PWM has an
independent logic-level shutdown input (SD1 and SD2).
A single PGOOD signal is issued when soft-start is complete
on both PWM controllers and their outputs are within 10% of
the set point and the linear regulator output is greater than
75% of its setpoint. Thermal shutdown circuitry turns off the
device if the junction temperature exceeds +150°C.
Features
• Wide Input Supply Voltage Range . . . . . . . . . 4.5V to 24V
• Three Independently Programmable Output Voltages
• Switching Frequency . . . . . . . . . . . . . . . . . . . . . . .1.4MHz
• Out of Phase PWM Controller Operation
- Reduces Required Input Capacitance and Power
Supply Induced Loads
• No External Current Sense Resistor
- Uses Lower MOSFET’s r
DS(ON)
• Bi-directional Frequency Synchronization for
Synchronizing Multiple ISL6402As
• Programmable Soft-Start
• Extensive circuit protection functions
- PGOOD
- UVLO
- Overcurrent
- Overtemperature
- Independent Shutdown for Both PWMs
• Excellent Dynamic Response
- Voltage Feed-Forward with Current Mode Control
• QFN Packages:
- QFN - Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-Free Available (RoHS Compliant)
Ordering Information
PART NUMBER
ISL6402AIR
ISL6402AIR-T
ISL6402AIR-TK
ISL6402AIRZ
(See Note)
ISL6402AIRZ-T
(See Note)
TEMP. RANGE
(°C)
-40 to 85
PACKAGE
28 Ld QFN
PKG.
DWG. #
L28.5x5
L28.5x5
L28.5x5
L28.5x5
L28.5x5
28 Ld QFN Tape and Reel
28 Ld QFN Tape and Reel
-40 to 85
28 Ld QFN
(Pb-free)
28 Ld QFN Tape and Reel
(Pb-free)
Applications
• Power Supplies with Multiple Outputs
• xDSL Modems/Routers
• DSP, ASIC, and FPGA Power Supplies
• Set-Top Boxes
• Dual Output Supplies for DSP, Memory, Logic,
µP
Core
and I/O
• Telecom Systems
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6402A
Absolute Maximum Ratings
Supply Voltage (VCC_5V Pin) . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Input Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+30V
BOOT1, 2 and UGATE1, 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
PHASE1, 2 and ISEN1, 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . +30V
BOOT1, 2 with respect to PHASE1, 2 . . . . . . . . . . . . . . . . . . . +6.5V
UGATE1, 2. . . . . . . . . . . . (PHASE1, 2 - 0.3V) to (BOOT1, 2 +0.3V)
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
28 Lead QFN (Note 2) . . . . . . . . . . .
33
4
Maximum Junction Temperature (Plastic Package) . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2.
θ
JC
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. For
θ
JA
the “case temp” location is the center of the exposed metal pad on the underside of the package. See Tech Brief TB379.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
Schematic. V
IN
= 5.6V to 24V, or VCC_5V = 5V ±10%, T
A
= -40°C to 85°C (Note 3),
Typical values are at T
A
= 25°C
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
VIN SUPPLY
Input Voltage Range
VCC_5V SUPPLY
(Note 4)
Input Voltage
Output Voltage
Maximum Output Current
SUPPLY CURRENT
Shutdown Current (Note 5)
Operating Current (Note 6)
REFERENCE SECTION
Nominal Reference Voltage
Reference Voltage Tolerance
POWER-ON RESET
Rising VCC_5V Threshold
Falling VCC_5V Threshold
OSCILLATOR
Total Frequency Variation
Peak-to-Peak Sawtooth Amplitude (Note 7)
5.6
12
24
V
4.5
V
IN
> 5.6V, I
L
= 20mA
V
IN
= 12V
4.5
60
5.0
5.0
-
5.6
5.5
-
V
V
mA
SD1 = SD2 = GND
-
-
50
2.0
375
4.0
µA
mA
-
-1.0
0.8
-
-
1.0
V
%
4.25
3.95
4.45
4.2
4.5
4.4
V
V
1.25
V
IN
= 12V
V
IN
= 5V
-
-
-
-
5.1
3.5
-
10
VCC - 0.6V
1.4
1.5
0.625
1.0
-
5.6
-
-
-
-
1.5
-
-
-
10.0
6.0
-
1.5
-
-
MHz
V
V
V
ns
MHz
V
V
ns
V
Ramp Offset (Note 8)
SYNC Input Rise/Fall Time
SYNC Frequency Range
SYNC Input HIGH Level
SYNC Input LOW Level
SYNC Input Minimum Pulse Width
SYNC Output HIGH Level
5
FN9010.3
京公网安备 11010802033920号
EEWORLD
