MC74HC4316A
Quad Analog Switch/
Multiplexer/Demultiplexer
with Separate Analog and
Digital Power Supplies
High−Performance Silicon−Gate CMOS
The MC74HC4316A utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low
OFF−channel leakage current. This bilateral switch/multiplexer/
demultiplexer controls analog and digital voltages that may vary
across the full analog power−supply range (from V
CC
to V
EE
).
The HC4316A is similar in function to the metal−gate CMOS
MC14016 and MC14066, and to the High−Speed CMOS HC4066A.
Each device has four independent switches. The device control and
Enable inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs. The device
has been designed so that the ON resistances (R
ON
) are much more
linear over input voltage than R
ON
of metal−gate CMOS analog
switches. Logic−level translators are provided so that the On/Off
Control and Enable logic−level voltages need only be V
CC
and GND,
while the switch is passing signals ranging between V
CC
and V
EE
.
When the Enable pin (active−low) is high, all four analog switches are
turned off.
Features
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MARKING
DIAGRAMS
16
16
1
PDIP−16
N SUFFIX
CASE 648
MC74HC4316AN
AWLYYWWG
1
16
16
1
SOIC−16
D SUFFIX
CASE 751B
1
16
16
1
SOEIAJ−16
F SUFFIX
CASE 966
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
74HC4316A
ALYWG
HC4316AG
AWLYWW
•
•
•
•
•
•
•
•
•
•
Logic−Level Translator for On/Off Control and Enable Inputs
Fast Switching and Propagation Speeds
High ON/OFF Output Voltage Ratio
Diode Protection on All Inputs/Outputs
Analog Power−Supply Voltage Range (V
CC
−
V
EE
) = 2.0 to 12.0 V
Digital (Control) Power−Supply Voltage Range
(V
CC
−
GND) = 2.0 V to 6.0 V, Independent of V
EE
Improved Linearity of ON Resistance
Chip Complexity: 66 FETs or 16.5 Equivalent Gates
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable*
ORDERING INFORMATION
Device
MC74HC4316ANG
MC74HC4316ADR2G
Package
PDIP−16
(Pb−Free)
Shipping
†
500 Units / Box
SOIC−16 2500/Tape&Reel
(Pb−Free)
NLV74HC4316ADR2G* SOIC−16 2500/Tape&Reel
(Pb−Free)
MC74HC4316AFELG
SOEIAJ−16
(Pb−Free)
50/Tape&Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2013
June, 2013
−
Rev. 8
1
Publication Order Number:
MC74HC4316A/D
MC74HC4316A
X
A
Y
A
Y
B
X
B
B ON/OFF
CONTROL
C ON/OFF
CONTROL
ENABLE
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
A ON/OFF
CONTROL
D ON/OFF
CONTROL
X
D
Y
D
Y
C
X
C
V
EE
FUNCTION TABLE
Inputs
Enable
L
L
H
X = Don’t Care.
On/Off Control
H
L
X
State of Analog
Switch
On
Off
Off
Figure 1. Pin Assignment
X
A
A ON/OFF CONTROL
1
15
LEVEL
TRANSLATOR
ANALOG
SWITCH
2
Y
A
X
B
B ON/OFF CONTROL
4
5
LEVEL
TRANSLATOR
ANALOG
SWITCH
3
Y
B
ANALOG
OUTPUTS/INPUTS
X
C
C ON/OFF CONTROL
10
6
LEVEL
TRANSLATOR
ANALOG
SWITCH
11
Y
C
PIN 16 = V
CC
PIN 8 = GND
PIN 9 = V
EE
GND
≥
V
EE
X
D
D ON/OFF CONTROL
ENABLE
13
14
7
LEVEL
TRANSLATOR
ANALOG
SWITCH
12
Y
D
ANALOG INPUTS/OUTPUTS = X
A
, X
B
, X
C
, X
D
Figure 2. Logic Diagram
PLOTTER
PROGRAMMABLE
POWER
SUPPLY
-
+
MINI COMPUTER
DC ANALYZER
V
CC
DEVICE
UNDER TEST
ANALOG IN
COMMON OUT
GND
V
EE
Figure 3. On Resistance Test Set−Up
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2
MC74HC4316A
MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
IS
V
in
I
P
D
Parameter
Positive DC Supply Voltage
(Ref. to GND)
(Ref. to V
EE
)
Value
– 0.5 to + 7.0
– 0.5 to + 14.0
– 7.0 to + 0.5
V
EE
– 0.5
to V
CC
+ 0.5
– 0.5 to V
CC
+ 0.5
±
25
750
500
450
– 65 to + 150
260
Unit
V
V
V
V
mA
mW
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
v
(V
in
or V
out
)
v
V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
Negative DC Supply Voltage (Ref. to GND)
Analog Input Voltage
DC Input Voltage (Ref. to GND)
DC Current Into or Out of Any Pin
Power Dissipation in Still Air
Plastic DIP*
EIAJ/SOIC Package*
TSSOP Package*
T
stg
T
L
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, SOIC or TSSOP Package)
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*Derating
−
Plastic DIP: – 10 mW/°C from 65° to 125°C
EIAJ/SOIC Package: – 7 mW/°C from 65° to 125°C
TSSOP Package:
−
6.1 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
EE
V
IS
V
in
V
IO
*
T
A
t
r
, t
f
Parameter
Positive DC Supply Voltage (Ref. to GND)
Negative DC Supply Voltage (Ref. to GND)
Analog Input Voltage
Digital Input Voltage (Ref. to GND)
Static or Dynamic Voltage Across Switch
Operating Temperature, All Package Types
Input Rise and Fall Time
(Control or Enable Inputs)
(Figure 10)
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Min
2.0
– 6.0
V
EE
GND
−
– 55
0
0
0
0
Max
6.0
GND
V
CC
V
CC
1.2
+ 125
1000
600
500
400
Unit
V
V
V
V
V
°C
ns
*For voltage drops across the switch greater than 1.2 V (switch on), excessive V
CC
current may
be drawn; i.e., the current out of the switch may contain both V
CC
and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
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3
MC74HC4316A
DC ELECTRICAL CHARACTERISTICS
Digital Section (Voltages Referenced to GND) V
EE
= GND Except Where Noted
Guaranteed Limit
Symbol
V
IH
Parameter
Minimum High−Level Voltage, Control
or Enable Inputs
Test Conditions
R
on
= Per Spec
V
CC
V
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
6.0
– 55 to
25°C
1.5
2.1
3.15
4.2
0.5
0.9
1.35
1.8
±
0.1
v
85°C
1.5
2.1
3.15
4.2
0.5
0.9
1.35
1.8
±
1.0
v
125°C
1.5
2.1
3.15
4.2
0.5
0.9
1.35
1.8
±
1.0
Unit
V
V
IL
Maximum Low−Level Voltage, Control
or Enable Inputs
R
on
= Per Spec
V
I
in
I
CC
Maximum Input Leakage Current,
Control or Enable Inputs
Maximum Quiescent Supply Current
(per Package)
V
in
= V
CC
or GND
V
EE
= – 6.0 V
V
in
= V
CC
or GND
V
IO
= 0 V
V
EE
= GND
V
EE
= – 6.0
mA
mA
6.0
6.0
2
4
20
40
40
160
DC ELECTRICAL CHARACTERISTICS
Analog Section (Voltages Referenced to V
EE
)
Guaranteed Limit
Symbol
R
on
Parameter
Maximum “ON” Resistance
Test Conditions
V
in
= V
IH
V
IS
= V
CC
to V
EE
I
S
v
2.0 mA (Figure 3)
V
in
= V
IH
V
IS
= V
CC
or V
EE
(Endpoints)
I
S
v
2.0 mA (Figure 3)
DR
on
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Maximum Off−Channel
Leakage Current, Any One
Channel
Maximum On−Channel
Leakage Current, Any One
Channel
V
in
= V
IH
V
IS
= 1/2 (V
CC
−
V
EE
)
I
S
v
2.0 mA
V
in
= V
IL
V
IO
= V
CC
or V
EE
Switch Off (Figure 4)
V
in
= V
IH
V
IS
= V
CC
or V
EE
(Figure 5)
V
CC
V
2.0*
45
4.5
6.0
2.0
4.5
4.5
6.0
2.0
4.5
4.5
6.0
6.0
V
EE
V
– 55 to
25°C
−
160
90
90
−
90
70
70
−
20
15
15
0.1
v
85°C
−
200
110
110
−
115
90
90
−
25
20
20
0.5
v
125°C
−
240
130
130
−
140
105
105
−
30
25
25
1.0
Unit
W
0.0
0.0
−
4.5
−
6.0
0.0
0.0
−
4.5
−
6.0
0.0
0.0
– 4.5
– 6.0
– 6.0
W
I
off
mA
I
on
6.0
– 6.0
0.1
0.5
1.0
mA
*At supply voltage (V
CC
−
V
EE
) approaching 2.0 V the analog switch−on resistance becomes extremely non−linear. Therefore, for low−voltage
operation, it is recommended that these devices only be used to control digital signals.
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4
MC74HC4316A
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, Control or Enable t
r
= t
f
= 6 ns, V
EE
= GND)
Guaranteed Limit
Symbol
t
PLH
,
t
PHL
t
PLZ
,
t
PHZ
t
PZL
,
t
PZH
C
Parameter
Maximum Propagation Delay, Analog Input to Analog Output
(Figures 9 and 10)
Maximum Propagation Delay, Control or Enable to Analog Output
(Figures 11 and 12)
Maximum Propagation Delay, Control or Enable to Analog Output
(Figures 11 and 12)
Maximum Capacitance
ON/OFF Control
and Enable Inputs
Control Input = GND
Analog I/O
Feedthrough
V
CC
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
−
– 55 to
25°C
40
6
5
130
40
30
140
40
30
10
v
85°C
50
8
7
160
50
40
175
50
40
10
v
125°C
60
9
8
200
60
50
250
60
50
10
Unit
ns
ns
ns
pF
−
−
35
1.0
35
1.0
35
1.0
Typical @ 25°C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Per Switch) (Figure 14)*
*Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC 2
f + I
CC
V
CC
.
15
pF
ADDITIONAL APPLICATION CHARACTERISTICS
(GND = 0 V)
Symbol
BW
Parameter
Maximum On–Channel Bandwidth
or
Minimum Frequency Response
(Figure 6)
Off–Channel Feedthrough
Isolation
(Figure 7)
Test Conditions
f
in
= 1 MHz Sine Wave
Adjust f
in
Voltage to Obtain 0 dBm at V
OS
Increase f
in
Frequency Until dB Meter
Reads – 3 dB
R
L
= 50
W,
C
L
= 10 pF
f
in
Sine Wave
Adjust f
in
Voltage to Obtain 0 dBm at V
IS
f
in
= 10 kHz, R
L
= 600
W,
C
L
= 50 pF
f
in
= 1.0 MHz, R
L
= 50
W,
C
L
= 10 pF
V
CC
V
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
2.25
4.50
6.00
V
EE
V
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
– 2.25
– 4.50
– 6.00
Limit*
25°C
150
160
160
– 50
– 50
– 50
– 40
– 40
– 40
30
65
100
60
130
200
– 70
– 70
– 70
– 80
– 80
– 80
%
2.25
4.50
6.00
– 2.25
– 4.50
– 6.00
0.10
0.06
0.04
dB
mV
PP
Unit
MHz
−
dB
−
Feedthrough Noise, Control to
Switch
(Figure 8)
V
in
v
1 MHz Square Wave (t
r
= t
f
= 6 ns)
Adjust R
L
at Setup so that I
S
= 0 A
R
L
= 600
W,
C
L
= 50 pF
R
L
= 10 kW, C
L
= 10 pF
−
Crosstalk Between Any Two
Switches
(Figure 13)
f
in
Sine Wave
Adjust f
in
Voltage to Obtain 0 dBm at V
IS
f
in
= 10 kHz, R
L
= 600
W,
C
L
= 50 pF
f
in
= 1.0 MHz, R
L
= 50
W,
C
L
= 10 pF
THD
Total Harmonic Distortion
(Figure 15)
f
in
= 1 kHz, R
L
= 10 kW, C
L
= 50 pF
THD = THD
Measured
−
THD
Source
V
IS
= 4.0 V
PP
sine wave
V
IS
= 8.0 V
PP
sine wave
V
IS
= 11.0 V
PP
sine wave
*Limits not tested. Determined by design and verified by qualification.
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