Micrel, Inc.
2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10
SY89829U
Precision Edge
®
OR LVPECL CLOCK DRIVER w/ INTERNAL
SY89829U
TERMINATION AND REDUNDANT SWITCHOVER
Precision Edge
®
FEATURES
s
Dual 1:10 fanout buffer/translator
s
Accepts LVPECL or LVDS inputs
s
Multiplexed inputs ideal for redundant clock
Precision Edge
®
switchover
s
Guaranteed AC parameters:
DESCRIPTION
The SY89829U is a High Performance dual 1:10 or
single 1:20 LVPECL Clock Driver. The part is designed for
use in low voltage (2.5V/3.3V) applications which require a
large number of outputs to drive precisely aligned, ultra low
skew signals to their destination. The input is multiplexed
from either LVDS or LVPECL by the CLK_SEL pin. The
LVDS inputs include a 100Ω internal termination across
the input pair, thus eliminating any need for external
termination. The 2:1 input mux makes this device an ideal
choice for redundant clock applications that need to switch
between two reference clocks. The output enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
eliminates any chance of generating a runt clock pulse
when the device is enabled/disabled as can happen with an
asynchronous control.
The SY89829U features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89829U is available in a
single space saving package which provides a lower overall
cost solution. In addition, a single chip solution improves
timing budgets by eliminating the multiple device solution
with their corresponding large part-to-part skew.
• > 2GHz f
MAX
(toggle)
• < 50ps ch-ch skew
s
LVDS input includes 100Ω internal termination
Ω
s
Low supply voltage: 2.5V, 3.3V
s
–40
°
C to +85
°
C temperature range
s
Output enable (OE) pin
s
Available in 64 EPAD-TQFP
APPLICATIONS
s
High-performance PCs
s
Workstations
s
Parallel processor-based systems
s
Other high-performance computing
s
Communications
s
Redundant LVPECL or LVDS bus clock switchover
Precision Edge is a registered trademark of Micrel, Inc.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
1
Rev.: D
Amendment: /0
Issue Date: January 2007
Micrel, Inc.
Precision Edge
®
SY89829U
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
VCCO
Q7
/Q7
Q8
/Q8
Q9
/Q9
VCCO
VCCO
Q10
/Q10
Q11
/Q11
Q12
/Q12
VCCO
VCCO
/Q6
Q6
/Q5
Q5
/Q4
Q4
/Q3
Q3
/Q2
Q2
/Q1
Q1
/Q0
Q0
VCCO
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
SEL2
LVDS_CLKB
/LVDS_CLKB
VCCI
LVDS_CLKA
/LVDS_CLKA
CLK_SEL1
LVPECL_CLKA
/LVPECL_CLKA
GND
OE1
LVPECL_CLKB
/LVPECL_CLKB
CLK_SEL2
OE2
SEL1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Part Number
SY89829UHI
SY89829UHITR
(2)
SY89829UHY
(3)
SY89829UHYTR
(2, 3)
Package Operating
Type
Range
H64-1
H64-1
H64-1
H64-1
Industrial
Industrial
Industrial
Industrial
Package
Marking
SY89829UHI
SY89829UHI
Lead
Finish
Sn-Pb
Sn-Pb
64-Pin
EPAD-TQFP
(Top View)
SY89829UHY with
Pb-Free
Pb-Free bar-line indicator Matte-Sn
SY89829UHY with
Pb-Free
Pb-Free bar-line indicator Matte-Sn
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
VCCO
/Q19
Q19
/Q18
Q18
/Q16
Q17
/Q16
Q16
/Q15
Q15
/Q14
Q14
/Q13
Q13
VCCO
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
64-Pin TQFP (H64-1)
PIN NAMES
Pin
LVDS_CLKA,
/LVDS_CLKA,
LVDS_CLKB,
/LVDS_CLKB
LVPECL_CLKA,
/LVPECL_CLKA
LVPECL_CLKB,
/LVPECL_CLKB
CLK_SEL1,
CLK_SEL2
SEL1, SEL2
OE1, OE2
Q
0
– Q
19
, /Q
0
– /Q
19
GND
V
CCI
Function
Differential LVDS Inputs with Internal 100Ω Termination.
Differential LVPECL Inputs. For DC-coupled input signals, terminate the input signal with 50Ω to V
CC
–2V.
For AC-coupled to V
CC
–2V. For AC-coupled terminate the input signal with 50Ω to V
CC
–3V.
Input CLK Select (LVTTL).
Input Select (LVTTL).
Output Enable (LVTTL).
Differential LVPECL Outputs. Normally terminated with 50Ω to V
CC
–2V. Unused output pairs can be left
floating.
Ground.
Power Supply for Output Drivers.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
2
Micrel, Inc.
Precision Edge
®
SY89829U
LOGIC SYMBOL
CLK_SEL1
SEL1
LVDS_CLKA
/LVDS_CLKA
LVPECL_CLKA
/LVPECL_CLKA
0
0
1
1
LEN
LVDS_CLKB
/LVDS_CLKB
LVPECL_CLKB
/LVPECL_CLKB
0
D
1
0
CLK_SEL2
1
LEN
SEL2
Q
OE2
D
10
10
10
10
OE1
Q
0
– Q
9
/Q
0
– /Q
9
Q
Q
10
– Q
19
/Q
10
– /Q
19
TRUTH TABLE
OE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
CLK_SEL1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
CLK_SEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
SEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
SEL2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
Q
0
– Q
9
LVDS_CLKA
LVDS_CLKA
LVDS_CLKB
LVDS_CLKB
LVDS_CLKA
LVDS_CLKA
LVPECL_CLKB
LVPECL_CLKB
LVPECL_CLKA
LVPECL_CLKA
LVDS_CLKB
LVDS_CLKB
LVPECL_CLKA
LVPECL_CLKA
LVPECL_CLKB
LVPECL_CLKB
LOW
/Q
0
– /Q
9
/LVDS_CLKA
/LVDS_CLKA
/LVDS_CLKB
/LVDS_CLKB
/LVDS_CLKA
/LVDS_CLKA
/LVPECL_CLKB
/LVPECL_CLKB
/LVPECL_CLKA
/LVPECL_CLKA
/LVDS_CLKB
/LVDS_CLKB
/LVPECL_CLKA
/LVPECL_CLKA
/LVPECL_CLKB
/LVPECL_CLKB
HIGH
Q
10
– Q
19
LVDS_CLKA
LVDS_CLKB
LVDS_CLKA
LVDS_CLKB
LVDS_CLKA
LVPECL_CLKB
LVDS_CLKA
LVPECL_CLKB
LVPECL_CLKA
LVDS_CLKB
LVPECL_CLKA
LVDS_CLKB
LVPECL_CLKA
LVPECL_CLKB
LVPECL_CLKA
LVPECL_CLKB
LOW
/Q
10
– /Q
19
/LVDS_CLKA
/LVDS_CLKB
/LVDS_CLKA
/LVDS_CLKB
/LVDS_CLKA
/LVPECL_CLKB
/LVDS_CLKA
/LVPECL_CLKB
/LVPECL_CLKA
/LVDS_CLKB
/LVPECL_CLKA
/LVDS_CLKB
/LVPECL_CLKA
/LVPECL_CLKB
/LVPECL_CLKA
/LVPECL_CLKB
HIGH
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge
®
SY89829U
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CCI
/ V
CCO
V
IN
I
OUT
T
LEAD
T
store
θ
JA
V
CC
Pin Potential to Ground Pin
Input Voltage
DC Output Current (Output HIGH)
Lead Temperature (soldering, 20sec.)
Storage Temperature
Package Thermal Resistance (Junction-to-Ambient)
With exposed pad soldered to GND
– Still-Air (multi-layer PCB)
– 200lfpm (multi-layer PCB)
– 500lfpm (multi-layer PCB)
Exposed pad
not
soldered to GND
– Still-Air (multi-layer PCB)
– 200lfpm (multi-layer PCB)
– 500lfpm (multi-layer PCB)
Rating
Value
–0.5 to +4.0
–0.5 to V
CCI
–50
260
–65 to +150
23
18
15
44
36
30
4.3
Unit
V
V
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ
JC
Package Thermal Resistance
(Junction-to-Case)
NOTE:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data book. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY89829U
DC ELECTRICAL CHARACTERISTICS
Power Supply
T
A
= –40
°
C
Symbol
V
CCI,
V
CCO
I
CC
Parameter
Power Supply
(1)
I
CC
Total Supply Current
(2)
Min.
2.37
—
Typ.
—
100
Max.
3.6
150
Min.
2.37
—
T
A
= +25
°
C
Typ.
—
100
Max.
3.8
150
Min.
2.37
—
T
A
= +85
°
C
Typ.
—
100
Max.
3.6
150
Unit
V
mA
NOTES:
1. V
CCI
and V
CCO
must be connected together on the PCB such that they remain at the same potential. V
CCI
and V
CCO
are not internally connected on the
die.
2. No load. Outputs floating.
LVDS Input (V
CC
= 2.37V to 3.6V, GND = 0V)
T
A
= –40
°
C
Symbol
V
IN
V
ID
I
IL
R
IN
Parameter
Input Voltage Range
Differential Input Swing
Input Low Current
(1)
LVDS Differential Input Resistance
(LVDS_CLK to /LVDS_CLK)
Min.
0
100
–1.0
80
Typ.
—
—
—
100
Max.
2.4
—
—
120
Min.
0
100
–1.0
80
T
A
= +25
°
C
Typ.
—
—
—
100
Max.
2.4
—
—
120
Min.
0
100
–1.0
80
T
A
= +85
°
C
Typ.
—
—
—
100
Max.
2.4
—
—
120
Unit
V
mV
mA
Ω
NOTE:
1. For I
IL
, both LVDS inputs are grounded.
LVPECL Input / Output
(V
CC
= 2.37V to 3.6V, GND = 0V)
T
A
= –40
°
C
Symbol
V
IH
V
IL
V
PP
V
CMR
V
OH
V
OL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Minimum Input Swing
(1)
LVPECL_CLK
Common Mode Range
(2)
LVPECL_CLK
Output HIGH Voltage
Output LOW Voltage
Input HIGH Current
Input LOW Current
Min.
V
CC
– 1.165
600
–1.5
Max.
V
CC
– 0.88
—
–0.4
T
A
= +25
°
C
Min.
V
CC
– 1.165
600
–1.5
Max.
V
CC
– 0.88
—
–0.4
T
A
= +85
°
C
Min.
V
CC
– 1.165
600
–1.5
Max.
V
CC
– 0.88
—
–0.4
Unit
V
V
mV
V
V
V
µA
µA
V
CC
– 1.945 V
CC
– 1.625 V
CC
– 1.945
V
CC
– 1.625 V
CC
– 1.945 V
CC
– 1.625
V
CCO
– 1.085 V
CCO
– 0.880 V
CCO
– 1.025 V
CCO
– 0.880 V
CCO
– 1.025 V
CCO
– 0.880
V
CCO
– 1.830 V
CCO
– 1.555 V
CCO
– 1.810 V
CCO
– 1.620 V
CCO
– 1.810 V
CCO
– 1.620
—
0.5
150
—
—
0.5
150
—
—
0.5
150
—
NOTES:
1. The V
PP
(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
2. V
CMR
is defined as the range within which the V
IH
level may vary, with the device still meeting the propagation delay specification. The numbers in
the table are referenced to V
CCI
. The V
IL
level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to V
PP
(min.).
The lower end of the CMR range varies 1:1 with V
CCI
. The V
CMR
(min) will be fixed at 3.3V – |V
CMR
(min)|.
LVCMOS/LVTTL Control Input (OE1, OE2, CLK_SEL1, CLK_SEL2)
T
A
= –40
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
2.0
—
+20
—
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
5
Min.
2.0
—
+20
—
T
A
= +25
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Min.
2.0
—
+20
—
T
A
= +85
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Unit
V
V
µA
µA
M9999-011907
hbwhelp@micrel.com or (408) 955-1690
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